MPC8544VTALF Freescale Semiconductor, MPC8544VTALF Datasheet - Page 2
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MPC8544VTALF
Manufacturer Part Number
MPC8544VTALF
Description
MPU POWERQUICC III 783-PBGA
Manufacturer
Freescale Semiconductor
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
Specifications of MPC8544VTALF
Processor Type
MPC85xx PowerQUICC III 32-Bit
Speed
667MHz
Voltage
1V
Mounting Type
Surface Mount
Package / Case
783-FCPBGA
Processor Series
MPC85xx
Core
e500
Data Bus Width
32 bit
Maximum Clock Frequency
667 MHz
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Data Ram Size
32 KB
I/o Voltage
1.8 V, 3.3 V
Interface Type
I2C, HSSI, DUART
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MPC8544VTALF
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Company:
Part Number:
MPC8544VTALFA
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
MPC8544E Technical
Specifications
• Embedded e500 core, initial
• Enhanced hardware and software
• Double-precision embedded scalar and
• Memory management unit (MMU)
• Integrated L1/L2 cache
offerings from 667 MHz up to 1.067 GHz
debug support
vector floating point APUs
Dual dispatch superscalar, seven-stage
pipeline design with out-of-order issue
and execution
2,240 MIPS at 1.0 GHz
(estimated Dhrystone 2.1)
36-bit physical addressing
L1 cache—32 KB data and 32 KB
instruction cache with line-locking
support
L2 cache—256 KB (8-way set
associative) 256/128/64/32 KB can be
used as SRAM
Freescale, the Freescale logo, CodeWarrior and PowerQUICC are trademarks of Freescale Semiconductor, Inc.,
Reg. U.S. Pat. & Tm. Off. All other product or service names are the property of their respective owners. The Power
Architecture and Power.org word marks and the Power and Power.org logos and related marks are trademarks and
service marks licensed by Power.org. © 2007, 2010 Freescale Semiconductor, Inc.
Document Number: MPC8544FS
REV 2
Development System
The MPCEVAL-DS-8544 development system includes Linux
with optimized drivers to support all peripherals and a limited CodeWarrior
development tools evaluation license.
• Integrated DDR memory controller with full
• Integrated security engine supporting
• Two on-chip, three-speed Ethernet
ECC support, offering:
DES, 3DES, MD-5, SHA-1/2, AES,
RSA, RNG, Kasumi F8/F9 and ARC-4
encryption algorithms (MPC8544E)
controllers (eTSECs) supporting 10 Mbps,
100 Mbps and 1 Gbps Ethernet/IEEE
802.3 networks with MII, RMII, GMII,
RGMII TBI and RTBI physical interfaces,
as well as SGMII interfaces through a
dedicated SerDes
L1 and L2 hardware coherency
L2 cache and I/O transactions can be
stashed into L2 cache regions
200 MHz clock rate (400 MHz data
rate), 64-bit, 2.5V/2.6V I/O, DDR
SDRAM
267 MHz clock rate (up to 533 MHz
data rate), 64-bit, 1.8V I/O, DDR2
SDRAM
TCP/UDP/IP checksum acceleration
Advanced QoS features
Learn More:
®
• General-purpose input/output (GPIO)
• PCI Express high-speed interconnect
• On-chip network (OCeaN) switch fabric
• PCI interface support
• Local bus
• Integrated four-channel DMA controller
• Dual I
• Programmable interrupt controller (PIC)
• IEEE 1149.1 JTAG test access port
• 1.0V core voltage with 3.3V and 2.5V I/O
• 783-pin FC-PBGA package
• Operating junction temperature range:
For current information about Freescale
products and documentation, please visit
freescale.com/PowerQUICC.
interfaces, supporting combinations of
dual x4 and single x1 PCI Express
T
range: T
J
32-bit PCI 2.2 bus controller
(up to 66 MHz, 3.3V I/O)
133 MHz, 32-bit, 3.3V I/O, local bus
with memory controller
= 0ºC to +105ºC, extended temperature
2
C and DUART support
J
®
= -40ºC to +105ºC
2.6.19 + BSP