MPC862PCZQ80B Freescale Semiconductor, MPC862PCZQ80B Datasheet - Page 16

IC MPU PWRQUICC 80MHZ 357-PBGA

MPC862PCZQ80B

Manufacturer Part Number
MPC862PCZQ80B
Description
IC MPU PWRQUICC 80MHZ 357-PBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC862PCZQ80B

Processor Type
MPC8xx PowerQUICC 32-Bit
Speed
80MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
357-PBGA
Family Name
MPC8xx
Device Core
PowerQUICC
Device Core Size
32b
Frequency (max)
80MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
2.5/3.3V
Operating Supply Voltage (max)
3.465/3.6V
Operating Supply Voltage (min)
2/3.135V
Operating Temp Range
-40C to 115C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
357
Package Type
BGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC862PCZQ80B
Manufacturer:
VISHAY
Quantity:
40 000
Part Number:
MPC862PCZQ80B
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Bus Signal Timing
Table 7
and 66 Mhz.
The timing for the MPC862/857T/857DSL bus shown assumes a 50-pF load for maximum delays and a
0-pF load for minimum delays.
16
Num
B5
B1a EXTCLK to CLKOUT phase skew
B1b EXTCLK to CLKOUT phase skew
B1c CLKOUT phase jitter (EXTCLK > 15
B1d CLKOUT phase jitter
B1e CLKOUT frequency jitter (MF < 10)
B1g CLKOUT frequency jitter (MF > 500)
B1h Frequency jitter on EXTCLK
B7a CLKOUT to TSIZ(0:1), REG, RSV,
B7b CLKOUT to BR, BG, FRZ, VFLS(0:1),
B1f
B1
B2
B3
B4
B7
B8
33
provides the bus operation timing for the MPC862/857T/857DSL at 33 MHz, 40 Mhz, 50 MHz
CLKOUT period
(EXTCLK > 15 MHz and MF <= 2)
(EXTCLK > 10 MHz and MF < 10)
MHz and MF <= 2)
CLKOUT frequency jitter (10 < MF <
500)
CLKOUT pulse width low (MIN = 0.040
x B1)
CLKOUT width high (MIN = 0.040 x
B1)
CLKOUT rise time
+ 4.00)
CLKOUT fall time
4.00)
CLKOUT to A(0:31), BADDR(28:30),
RD/WR, BURST, D(0:31), DP(0:3)
invalid (MIN = 0.25 x B1)
AT(0:3), BDIP, PTR invalid (MIN = 0.25
x B1)
VF(0:2) IWP(0:2), LWP(0:1), STS
invalid
CLKOUT to A(0:31), BADDR(28:30)
RD/WR, BURST, D(0:31), DP(0:3)
valid (MAX = 0.25 x B1 + 6.3)
1
4
(MIN = 0.25 x B1)
MPC862/857T/857DSL PowerQUICC™ Family Hardware Specifications, Rev. 3
Characteristic
3
3
(MAX = 0.00 x B1 +
1
(MAX = 0.00 x B1
1
2
Table 7. Bus Operation Timings
1
1
12.10
12.10
30.30
-0.90
-2.30
-0.60
-2.00
7.60
7.60
7.60
7.60
Min
33 MHz
30.30
13.80
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
10.00
10.00
25.00
-0.90
-2.30
-0.60
-2.00
6.30
6.30
6.30
6.30
Min
40 MHz
30.30
12.50
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
20.00
-0.90
-2.30
-0.60
-2.00
8.00
8.00
5.00
5.00
5.00
5.00
Min
50 MHz
30.30
11.30
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
15.15
Freescale Semiconductor
-0.90
-2.30
-0.60
-2.00
6.10
6.10
3.80
3.80
3.80
3.80
Min
66 MHz
30.30
10.00
Max
0.90
2.30
0.60
2.00
0.50
2.00
3.00
0.50
4.00
4.00
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
%
%
%
%

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