MPC8255ACZUMIBB Freescale Semiconductor, MPC8255ACZUMIBB Datasheet - Page 19

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MPC8255ACZUMIBB

Manufacturer Part Number
MPC8255ACZUMIBB
Description
IC MPU POWERQUICC II 480-TBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC8255ACZUMIBB

Processor Type
MPC82xx PowerQUICC II 32-bit
Speed
266MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
480-TBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

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Figure 11
Freescale Semiconductor
MPC8260 PowerQUICC II Integrated Communications Processor Hardware Specifications, Rev. 2
shows signal behavior in MEMC mode.
Generally, all MPC8260 bus and system output signals are driven from the
rising edge of the input clock (CLKin). Memory controller signals,
however, trigger on four points within a CLKin cycle. Each cycle is divided
by four internal ticks: T1, T2, T3, and T4. T1 always occurs at the rising
edge, and T3 at the falling edge, of CLKin. However, the spacing of T2 and
T4 depends on the PLL clock ratio selected, as shown in
Figure 12
Memory controller signals
1:2, 1:3, 1:4, 1:5, 1:6
CLKin
CLKin
CLKin
PLL Clock Ratio
Figure 12. Internal Tick Spacing for Memory Controller Signals
1:2.5
1:3.5
T1
T1
T1
is a graphical representation of
Table 11. Tick Spacing for Memory Controller Signals
CLKin
V_CLK
T2
T2
T2
1/4 CLKin
3/10 CLKin
4/14 CLKin
Figure 11. MEMC Mode Diagram
Tick Spacing (T1 Occurs at the Rising Edge of CLKin)
T3
T3
T3
T2
NOTE
T4
T4
1/2 CLKin
1/2 CLKin
1/2 CLKin
T4
Table
sp34/sp30
T3
11.
for 1:2, 1:3, 1:4, 1:5, 1:6
for 1:2.5
for 1:3.5
Table
3/4 CLKin
8/10 CLKin
11/14 CLKin
Electrical and Thermal Characteristics
11.
T4
19

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