MC68040FE25V Freescale Semiconductor, MC68040FE25V Datasheet - Page 207
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC68040FE25V
Manufacturer Part Number
MC68040FE25V
Description
IC MICROPROCESSOR 32BIT 184-CQFP
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68EC040FE33A.pdf
(442 pages)
Specifications of MC68040FE25V
Processor Type
M680x0 32-Bit
Speed
25MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
184-CQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
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7.10 RESET OPERATION
An external device asserts the reset input signal (RSTI) to reset the processor. When
power is applied to the system, external circuitry should assert RSTI for a minimum of 10
BCLK cycles after V
the power-on reset operation, illustrating the relationships among V
selects, and bus signals. The BCLK and PCLK clock signals are required to be stable by
the time V
MOTOROLA
CC
Figure 7-43. Snooped Long-Word Write, Memory Inhibited
reaches the minimum operating specification. The V
SIZ1, SIZ0
SC1, SC0
*
AM_BG
TT1, TT0
AM_BR
D31–D0
A31–A0
AM indicates the alternate bus master.
BCLK
R/W
BR
BG
TA
BB
TS
MI
*
*
CC
Freescale Semiconductor, Inc.
is within tolerance. Figure 7-44 is a functional timing diagram of
C1
For More Information On This Product,
C2
Go to: www.freescale.com
MEMORY INHIBITED FROM RESPONDING
M68040 USER’S MANUAL
ALTERNATE MASTER
LONG-WORD WRITE
C3
TA DRIVEN BY PROCESSOR
DATA WRITTEN BY ALTERNATE BUS MASTER
C4
C5
C6
IH
PROCESSOR
levels of the clocks
CC
, RSTI, mode
7- 65
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