MC68EC040RC40A Freescale Semiconductor, MC68EC040RC40A Datasheet - Page 175

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MC68EC040RC40A

Manufacturer Part Number
MC68EC040RC40A
Description
IC MPU 32BIT 40MHZ 179-PGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68EC040RC40A

Processor Type
M680x0 32-Bit
Speed
40MHz
Voltage
5V
Mounting Type
Surface Mount
Package / Case
179-PGA
Lead Free Status / RoHS Status
Contains lead / RoHS Compliant
Features
-
7.5.1.2 AUTOVECTOR INTERRUPT ACKNOWLEDGE BUS CYCLE. When the
interrupting device cannot supply a vector number, it requests an automatically generated
vector (autovector). Instead of placing a vector number on the data bus and asserting TA,
the device asserts the autovector (AVEC) signal with TA to terminate the cycle. AVEC is
only sampled with TA asserted. AVEC can be grounded if all interrupt requests are
autovectored.
The vector number supplied in an autovector operation is derived from the interrupt priority
level of the current interrupt. When the AVEC signal is asserted with TA during an interrupt
acknowledge bus cycle, the M68040 ignores the state of the data bus and internally
MOTOROLA
Figure 7-22. Interrupt Acknowledge Bus Cycle Timing
UPA1, UPA0
TM2–TM0
TT1, TT0
D31–D8
A31–A0
CIOUT
Freescale Semiconductor, Inc.
D7–D0
AVEC
BCLK
SIZ0
SIZ1
R/W
TIP
For More Information On This Product,
TS
TA
ACKNOWLEDGE
C1
INTERRUPT
Go to: www.freescale.com
M68040 USER’S MANUAL
BYTE
C2
VECTOR #
INTERRUPT LEVEL
C1
WRITE STACK
C2
7- 33

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