AT75C310-Q160 Atmel, AT75C310-Q160 Datasheet - Page 6

IC SIAP ARM/THUMB OAKDSP 160PQFP

AT75C310-Q160

Manufacturer Part Number
AT75C310-Q160
Description
IC SIAP ARM/THUMB OAKDSP 160PQFP
Manufacturer
Atmel
Datasheet

Specifications of AT75C310-Q160

Processor Type
Smart Internet Appliance Processor
Speed
40MHz
Voltage
3.3V
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Functional Description
ARM7TDMI Core
DSP Subsystem
Boot ROM
Boot Code
Operation
6
AT75C310
The ARM7TDMI is a three-stage pipeline, 32-bit RISC processor. The processor architecture
is Von Neumann load/store architecture which is characterized by a single data and address
bus for instructions and data. The CPU has two instruction sets: the ARM and the Thumb
instruction set. The ARM instruction set has 32-bit wide instructions and provides maximum
performance. Thumb instructions are 16 bits wide and give maximum code density. Instruc-
tions operate on 8-, 16- and 32-bit data types.
The CPU has seven operating modes. Each operating mode has dedicated banked registers
for fast exception handling. The processor has a total of 37 32-bit registers, including six sta-
tus registers.
The AT75C310 has two identical DSP subsystems.
Each DSP subsystem is composed of:
The DSP subsystem is fully autonomous. The local X- and Y-RAM allow it to reach its maxi-
mum processing rate, and a local large data RAM enables complex DSP algorithms to be
implemented. The large size of the loadable program RAM permits the use of functions as
complex as a V.34 modem or a low bit-rate vocoder.
During boot time, the ARM7TDMI core has the ability to maintain the OakDSPCore in reset
state and to upload DSP boot code. When the OakDSPCore reverts to an active state, this
boot code can be used to get the complete DSP application code from the ARM7TDMI
through the mailbox.
When the OakDSPCore is running the dual-port mailbox is used as the communication chan-
nel between the ARM7TDMI and the OakDSPCore.
One programmable codec interface is directly connected to each OakDSPCore. It allows the
connection of most industrial voice, multimedia or data codecs.
The ARM7TDMI has the ability to boot either from an external memory or from the on-chip 256
x 32-bit boot ROM.
The internal boot sequence allows programming of the ARM7TDMI program RAM through a
serial port. When the download is complete, a branch is executed to the downloaded code.
An OakDSPCore running at 40 MIPS
2K x 16 of X-RAM
2K x 16 of Y-RAM
16K x 16 of general purpose data RAM
24K x 16 of loadable program RAM
One 256 x 16 dual-port mailbox
One codec interface
1369AS–03/01

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