MPC755BRX300LE Freescale Semiconductor, MPC755BRX300LE Datasheet - Page 11

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MPC755BRX300LE

Manufacturer Part Number
MPC755BRX300LE
Description
IC MPU 32BIT 300MHZ PPC 360-CBGA
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MPC755BRX300LE

Processor Type
MPC7xx PowerPC 32-Bit
Speed
300MHz
Voltage
2V
Mounting Type
Surface Mount
Package / Case
360-FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MPC755BRX300LE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Table 7
Freescale Semiconductor
At recommended operating conditions (see
Capacitance, V
Notes:
1. Nominal voltages; see
2. For processor bus signals, the reference is OV
3. Excludes test signals (LSSD_MODE, L1_TSTCLK, L2_TSTCLK) and IEEE 1149.1 boundary scan (JTAG) signals.
4. Capacitance is periodically sampled rather than 100% tested.
5. The leakage is measured for nominal OV
Typical
Maximum
Maximum
Maximum
Maximum
Maximum
Notes:
1. These values apply for all valid processor bus and L2 bus ratios. The values do not include I/O supply power (OV
2. Maximum power is measured at nominal V
3. Typical power is an average value measured at the nominal recommended V
4. Not 100% tested. Characterized and periodically sampled.
both OV
L2OV
<10% of V
instructions which keep the execution units maximally busy.
running a typical code sequence.
DD
provides the power consumption for the MPC755.
DD
) or PLL/DLL supply power (AV
DD
and V
in
power. Worst case power consumption for AV
Characteristic
= 0 V, f = 1 MHz
DD
vary by either +5% or –5%).
Table 3
MPC755 RISC Microprocessor Hardware Specifications, Rev. 8
for recommended operating conditions.
Table 6. DC Electrical Specifications (continued)
Table
Table 7. Power Consumption for MPC755
DD
Sleep Mode (PLL and DLL Disabled)
DD
3)
and L2AV
DD
and V
(see
DD
300 MHz
Voltage
Nominal
while L2OV
DD
Table
550
510
Full-Power Mode
3.1
4.5
1.8
1.0
Bus
DD
, or both OV
Sleep Mode
Doze Mode
Nap Mode
). OV
Processor (CPU) Frequency
3) while running an entirely cache-resident, contrived sequence of
1
DD
DD
DD
Symbol
= 15 mW and L2AV
and L2OV
C
is the reference for the L2 bus signals.
DD
in
350 MHz
and V
550
510
3.6
6.0
2.0
1.0
DD
DD
DD
power is system dependent, but is typically
must vary in the same direction (for example,
Min
(see
DD
400 MHz
Table
= 15 mW.
Electrical and Thermal Characteristics
550
510
5.4
8.0
2.3
1.0
3) and 65°C in a system while
Max
5.0
Unit
mW
mW
W
W
W
W
Unit
pF
DD
Notes
1, 2, 4
1, 3, 4
1, 2, 4
1, 2, 4
1, 2
1, 2
and
Notes
3, 4
11

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