MC8640DHX1000HC Freescale Semiconductor, MC8640DHX1000HC Datasheet - Page 40
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MC8640DHX1000HC
Manufacturer Part Number
MC8640DHX1000HC
Description
MPU DUAL E600 1023-FCCBGA
Manufacturer
Freescale Semiconductor
Datasheet
1.MC8640HX1067NE.pdf
(130 pages)
Specifications of MC8640DHX1000HC
Processor Type
MPC86xx PowerPC 32-Bit
Speed
1.0GHz
Voltage
1.05V
Mounting Type
Surface Mount
Package / Case
1023-FCCBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Features
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Part Number:
MC8640DHX1000HC
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Ethernet Management Interface Electrical Characteristics
Figure 21
Figure 22
9
The electrical characteristics specified here apply to MII management interface signals MDIO
(management data input/output) and MDC (management data clock). The electrical characteristics for
GMII, RGMII, RMII, TBI and RTBI are specified in
Ethernet (eTSEC), MII Management.”
40
At recommended operating conditions with L/TV
RXD[1:0], CRS_DV, RX_ER hold time to REF_CLK rising edge
Note:
1. The symbols used for timing specifications herein follow the pattern of t
for inputs and t
receive timing (MR) with respect to the time data input signals (D) reach the valid state (V) relative to the t
(K) going to the high (H) state or setup time. Also, t
input signals (D) went invalid (X) relative to the t
general, the clock reference symbol representation is based on three letters representing the clock of a particular functional.
For example, the subscript of t
used with the appropriate letter: R (rise) or F (fall).
Ethernet Management Interface Electrical
Characteristics
provides the AC test load for eTSEC.
shows the RMII receive AC timing diagram.
MPC8640 and MPC8640D Integrated Host Processor Hardware Specifications, Rev. 3
(first two letters of functional block)(reference)(state)(signal)(state)
REF_CLK
RXD[1:0]
CRS_DV
RX_ER
Table 37. RMII Receive AC Timing Specifications (continued)
Parameter
Output
MRX
Figure 22. RMII Receive AC Timing Diagram
represents the MII (M) receive (RX) clock. For rise and fall times, the latter convention is
t
RMRH
t
RMRDV
DD
Figure 21. eTSEC AC Test Load
of 3.3 V ± 5%.
t
RMR
Z
0
MRX
= 50 Ω
MRDXKL
clock reference (K) going to the low (L) state or hold time. Note that, in
Valid Data
symbolizes MII receive timing (GR) with respect to the time data
“Section 8, “Ethernet: Enhanced Three-Speed
t
RMRF
Symbol
t
RMRDX
for outputs. For example, t
(first two letters of functional block)(signal)(state) (reference)(state)
R
1
t
RMRDX
t
L
RMRR
= 50 Ω
Min
2.0
LV
DD
/2
Typ
—
MRDVKH
Freescale Semiconductor
symbolizes MII
MRX
Max
—
clock reference
Unit
ns
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