ATF16V8C-7JU Atmel, ATF16V8C-7JU Datasheet - Page 7

IC PLD 7NS 20PLCC

ATF16V8C-7JU

Manufacturer Part Number
ATF16V8C-7JU
Description
IC PLD 7NS 20PLCC
Manufacturer
Atmel
Datasheets

Specifications of ATF16V8C-7JU

Programmable Type
EE PLD
Number Of Macrocells
8
Voltage - Input
5V
Speed
7ns
Mounting Type
Surface Mount
Package / Case
20-PLCC
Family Name
ATF16V8C
Process Technology
EECMOS
# Macrocells
8
# I/os (max)
8
Frequency (max)
125MHz
Propagation Delay Time
7.5ns
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
20
Logic Family
ATF16V8C
Maximum Operating Frequency
125 MHz
Number Of Programmable I/os
8
Delay Time
7.5 ns
Operating Supply Voltage
5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Product Terms Per Macro
8
Supply Voltage (max)
5.5 V
Supply Voltage (min)
4.5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Functional Logic Diagram Description
The Logic Option and Functional Diagrams describe the
ATF16V8C architecture. Eight configurable macrocells can
be configured as a registered output, combinatorial I/O,
combinatorial output, or dedicated input.
The ATF16V8C can be configured in one of three different
modes. Each mode makes the ATF16V8C look like a differ-
ent device. Most PLD compilers can choose the right mode
automatically. The user can also force the selection by sup-
plying the compiler with a mode selection. The determining
factors would be the usage of register versus combinatorial
outputs and dedicated outputs versus outputs with output
enable control.
The ATF16V8C universal architecture can be programmed
to emulate many 20-pin PAL devices. These architectural
Compiler Mode Selection
Notes:
ABEL, Atmel-ABEL
CUPL, Atmel-CUPL
LOG/iC
OrCAD-PLD
PLDesigner
Synario/Atmel-Synario
Tango-PLD
With PD ENABLE
With PD ENABLE
With PD ENABLE
1. Please call Atmel PLD Hotline at (408) 436-4333 for more information.
2. Only applicable for version 3.4 or lower.
GAL16V8_R
G16V8CPMS
P16V8PDR
“Registered”
Registered
G16V8MS
G16V8R
P16V8R
P16V8R
NA
NA
(1)
(2)
GAL16V8_C7
P16V8PDC
G16V8CPMA
G16V8MA
“Complex”
Complex
G16V8C
P16V8C
P16V8C
subsets can be found in each of the configuration modes
described in the following pages. The user can download
the listed subset device JEDEC programming file to the
PLD programmer, and the ATF16V8C can be configured to
act like the chosen device. Check with your programmer
manufacturer for this capability.
Unused product terms are automatically disabled by the
compiler to decrease power consumption. A Security Fuse,
when programmed, protects the content of the ATF16V8C.
Eight bytes (64 fuses) of User Signature are accessible to
the user for purposes such as storing project name, part
number, revision, or date. The User Signature is accessible
regardless of the state of the Security Fuse.
NA
NA
(1)
(2)
GAL16V8_C8
G16V8CPAS
P16V8PD
G16V8AS
G16V8AS
P16V8AS
“Simple”
P16V8C
Simple
NA
NA
ATF16V8C
(1)
(2)
ATF16V8C (PD) ALL
ATF16V8C ALL
P16V8PDS
Auto Select
GAL16V8A
G16V8CP
GAL16V8
G16V8A
P16V8A
G16V8
P16V8
(1)
(1)
7

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