CS4270-CZZ Cirrus Logic Inc, CS4270-CZZ Datasheet - Page 35

• Manufacturer Part Number: CS4270-CZZ
• Description: IC CODEC 24BIT 105DB 24TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4270-CZZ

• Package / Case: 24-TSSOP
• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 105
• Voltage - Supply, Analog: 3.1 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -10°C ~ 70°C
• Mounting Type: Surface Mount
• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 216 KSPS
• Interface Type: Serial (I2S, SPI)
• Resolution: 24 bit
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 10 C
• Number Of Channels: 2 ADC/2 DAC
• Thd Plus Noise: - 95 dB ADC / - 95 dB DAC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1002 - BOARD EVAL FOR CS4270 CODEC
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 598-1040-5

DS686PP1
8. REGISTER DESCRIPTION
** All registers are read/write in I²C Mode and SPI Mode, unless otherwise noted**
8.1
8.2
8.2.1 Freeze (Bit 7)
8.2.2 PDN_ADC (Bit 5)
8.2.3 PDN_DAC (Bit 1)
8.2.4 Power Down (Bit 0)
Freeze
id<3>
7
7
Chip ID - Address 01h
Function:
This register is Read-Only. Bits 7 through 4 are the part number ID which is 1100b (01h) and the remaining
bits (b3:b0) are for the chip revision.
Power Control - Address 02h
Function:
This function allows modifications to be made to certain Control Port bits without the changes taking effect
until the Freeze bit is disabled. To make multiple changes to these bits take effect simultaneously, set the
Freeze bit, make all changes, then clear the Freeze bit. The bits affected by the Freeze function are listed
below:
Function:
The ADC portion of the device will enter a low-power state whenever this bit is set.
Function:
The DAC portion of the device will enter a low-power state whenever this bit is set.
Function:
The device will enter a low-power state whenever this bit is set. The contents of the control registers are
retained when the device is in power-down.
–
–
–
–
Register 05h (Bits 7:0)
Register 06h (Bits 7:0)
Register 07h (Bits 7:0)
Register 08h (Bits 7:0)
Reserved
id<2>
6
6
PDN_ADC
id<1>
5
5
Reserved
id<0>
4
4
Reserved
rev<3>
3
3
Reserved
rev<2>
2
2
PDN_DAC
rev<1>
1
1
CS4270
rev<0>
PDN
0
0
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