MAX9851ETM+ Maxim Integrated Products, MAX9851ETM+ Datasheet - Page 40

• Manufacturer Part Number: MAX9851ETM+
• Description: IC CODEC AUDIO STEREO 48TQFN-EP
• Manufacturer: Maxim Integrated Products
• Type: Stereo Audior

Specifications of MAX9851ETM+

• Data Interface: Serial
• Resolution (bits): 18 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• S/n Ratio, Adcs / Dacs (db) Typ: 81.5 / 88
• Dynamic Range, Adcs / Dacs (db) Typ: 82 / 87.5
• Voltage - Supply, Analog: 2.6 V ~ 3.3 V
• Voltage - Supply, Digital: 1.7 V ~ 3.3 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-TQFN Exposed Pad
• Number Of Adc Inputs: 3
• Number Of Dac Outputs: 3
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, I2C)
• Resolution: 18 bit
• Operating Supply Voltage: 1.7 V to 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 6.2 mA
• Thd Plus Noise: - 84 .5 dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

When the analog or digital supplies are removed from
the MAX9851/MAX9853, the headset detect circuit
enters sleep mode (PV
ly through a direct connection to the battery).
Alternatively, set SLEEP = 1 (register 0x19, bit B2) to
allow sleep mode to monitor headset insertion and
removal while the MAX9851/MAX9853 are in low-power
shutdown. In this mode, the external headset jack is
monitored for activity, but no attempt is made to detect
the headset configuration. For proper operation, the bat-
tery voltage must be available, through PV
rent bias is supplied to EXTMICBIASL to allow detection
of activity. If this pin is pulled low at any time, a hardware
interrupt is triggered and IRQ is set. IRQ remains assert-
ed until sleep mode is exited or the headset jack is
removed. Any pullup resistor on the open-drain IRQ out-
put will cause a small current to be drawn until the µC
can initiate a power-up sequence. Once power is
applied to the MAX9851/MAX9853, or SLEEP is set to 0,
the sleep mode is disabled and normal headset detect
functions can be used.
In sleep mode it is important that the microphone bias
be disabled by setting RBEN to 0, and that no parasitic
Stereo Audio CODECs with Microphone, DirectDrive
Headphones, Speaker Amplifiers, or Line Outputs
Figure 8. Headset-Detection Circuitry
40
______________________________________________________________________________________
DD
must remain powered, typical-
Power-Off/Sleep Mode
HPL
EXTMICBIASL
EXTMICBIASR
EXTMICR
EXTMICL
HPR
AV
DD
DD
AGND
. A low-cur-
V
V
INTMICBIAS
INTMICBIAS
AV
DD
10%
10%
80%
80%
95%
95%
diodes load the EXTMICBIASL/R pins. Also note that the
autodetect circuitry will trigger IRQ for approximately
50ms when PV
is first enabled. This is a consequence of the weak
pullup current used to sense EXTMICBIASL and the
attached AC-coupling capacitor that must be charged.
Set ENA to 1 (register 0x19, bit B3) and HSTEST to 01
(register 0x19, bits B1–B0) to enable normal operation.
In this mode EXTMICBIASL, EXTMICBIASR, HPL, and
HPR are probed to determine the loading of each pin.
The detected loading is then reported in the HSDET
bits (status register 0x01 B5–B0). The loading of each
pin is shown in Table 3 along with the reported HSDET
code. The headset configuration that corresponds to
some possible loading states is shown in Table 4.
Headphone detection is done in a two-step process.
Test 1 (HSTEST = 01) is used to determine if stereo
headphones are connected. If a balanced mono head-
phone is connected, this test will be inconclusive. Test
2 (HSTEST = 10) must then be performed to determine
the configuration. See Figure 9 for the typical head-
phone test procedure.
DD
is initially applied or when sleep mode
SLEEP
MODE
I
2
0x01 B5–B0
C REGISTER
CONTROL
MAX9851
MAX9853
IRQ
Normal Operation
IRQ