CS4270-DZZ Cirrus Logic Inc, CS4270-DZZ Datasheet - Page 44

• Manufacturer Part Number: CS4270-DZZ
• Description: IC CODEC 24BIT 105DB 24TSSOP
• Manufacturer: Cirrus Logic Inc
• Type: Stereo Audior

Specifications of CS4270-DZZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 2
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 105 / 105
• Voltage - Supply, Analog: 3.1 V ~ 5.25 V
• Voltage - Supply, Digital: 3.1 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 24-TSSOP
• Audio Codec Type: Stereo
• No. Of Adcs: 1
• No. Of Dacs: 1
• No. Of Input Channels: 3
• No. Of Output Channels: 3
• Adc / Dac Resolution: 24bit
• Sampling Rate: 216kSPS
• Ic Interface Type: I2C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1002 - BOARD EVAL FOR CS4270 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1622

44
12.ORDERING INFORMATION
13.REVISION HISTORY
Release
CDB4270
Product
CS4270
F1
24-Bit 192 kHz Stereo Audio CODEC 24-TSSOP
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CS4270 Evaluation Board
Deleted automotive grade content and references to grade throughout.
Formatting changes throughout.
Updated several
Added
Added decoupling cap to VLC on Typical Connection Diagram,
Performance specifications updated per measured data in
Specifications” on page
Added
Added
High-Z
Added CDOUT to
Added
Added
Updated descriptions of recommended power-up sequences in
page
Updated
port mode table).
Updated
Added
Updated
Updated presentation of input source resistance plots
Added
Updated bit names in
Updated
Updated
Updated
Updated
– Min
– Typ and Max
– Max
– Typ
– Typ and Max
– Typ and Max
– Typ
– Min
Description
3.3 V” on page
“CCLK Low Time” on page
21.
Transition Time from CCLK to CDOUT Valid (Note 21)
“Digital I/O Pin Characteristics” on page
“Acknowledge Delay from SCL Falling” on page
Table 2 on page 19
Note 22
Section 5.3 “Popguard Transient Control” on page
Section 6.2.2 SPI Read on page
to
“Clock Ratio Selection” on page 22
Section 5.2.7 “DC Offset Calibration Using the High-Pass Filter” on page
Section 5.5.1 “Input Component Values” on page
Section 8.3.2 “Ratio Select (Bits 3:1)” on page
Section 8.3.3 “Popguard Transient Control (Bit 0)” on page
Section 8.4.1
Section 8.5.4 “De-Emphasis Control (Bit 0)” on page
Specified Operating Conditions
Switching Characteristics - Software Mode - SPI Format
ADC Analog Characteristics
DC Electrical Characteristics
“Switching Characteristics - Software Mode - SPI Format” on page 18.
ADC Analog Characteristics
on
“Pin Descriptions” on page
Figure 13 on page
DAC Analog Characteristics
DC Electrical Characteristics
DC Electrical Characteristics
page
13.
Section 7. “Register Quick Reference” on page
and
8:
20.
and associated text in
Section 8.4.2 on page
Package
18.
-
18.
for
for
for
Changes
Pb-Free
30.
for
“Interchannel Isolation” on page
“Total Harmonic Distortion + Noise” on page
YES
“FILT+ Output Impedance” on page
-
4.
“DC Power Supplies:” on page
(added all SCLK/LRCK ratios to the serial control
for
6.
for
for
“Total Harmonic Distortion + Noise” on page
Section 5.1.1 Access to Stand-Alone
34.
-10° to +70° C
Temp Range
“Power Supply Current” on page
“Power Consumption VA = 5 V, VD = VLC=
(Figure 16
17.
33.
-
24.
Section 4. “Characteristics and
25.
and
36.
Figure 1 on page
“Serial Control Port Mode” on
Time from CS rising to CDOUT
and
Tape & Reel CS4270-CZZR
Container
for
33.
Rail
"CCLK High Time"
Figure 17 on page
31.
-
11.
8.
13.
CS4270-CZZ
CDB4270
Order #
7.
23.
13.
CS4270
DS686F1
11.
Mode.
26).
and
9.