CS42438-CMZ Cirrus Logic Inc, CS42438-CMZ Datasheet - Page 31
![IC CODEC 108DB 192KHZ 52-MQFP](/photos/6/80/68086/cs42438-cmz_sml.jpg)
CS42438-CMZ
Manufacturer Part Number
CS42438-CMZ
Description
IC CODEC 108DB 192KHZ 52-MQFP
Manufacturer
Cirrus Logic Inc
Type
Audio Codecr
Specifications of CS42438-CMZ
Package / Case
52-MQFP, 52-PQFP
Data Interface
Serial
Resolution (bits)
24 b
Number Of Adcs / Dacs
6 / 8
Sigma Delta
Yes
Dynamic Range, Adcs / Dacs (db) Typ
105 / 108 (Differential), 102 / 105 (Single-Ended)
Voltage - Supply, Analog
3.14 V ~ 5.25 V
Voltage - Supply, Digital
3.14 V ~ 3.47 V
Operating Temperature
-55°C ~ 150°C
Mounting Type
Surface Mount
Number Of Adc Inputs
6
Number Of Dac Outputs
8
Conversion Rate
192 KSPS
Interface Type
Serial (I2S, SPI)
Resolution
24 bit
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 10 C
Number Of Channels
6 ADC/8 DAC
Thd Plus Noise
- 98 dB ADC / - 98 dB DAC, - 95 dB ADC / - 95 dB DAC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1500 - BOARD EVAL FOR CS42438 CODEC
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
598-1032
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CS42438-CMZ
Manufacturer:
LT
Quantity:
413
Company:
Part Number:
CS42438-CMZ
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
Company:
Part Number:
CS42438-CMZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
DS646F2
No
H/W pins setup to
1. VQ = VA/2.
2. Aout bias = VA/2.
3. No audio signal generated.
Hardware Mode
desired settings.
Valid MCLK
Applied?
1. VQ = VA/2.
2. Aout = HI-Z.
3. No audio signal generated.
4. Control Port Registers reset
to default.
No
Power-Down (Power Applied)
Yes
Analog Output Mute
1. VQ = ?
2. Aout bias = ?
3. No audio signal
generated.
Access Detected?
Control Port
RST = Low?
Control Port
No Power
Accessed
Figure 11. Audio Output Initialization Flow Chart
No
ERROR: MCLK/LRCK ratio change
Registers setup to
Software Mode
desired settings.
Valid MCLK
Yes
Applied?
Yes
ERROR: Power removed
Yes
No
RST = Low
1. VQ = VA/2.
2. Aout bias = VA/2.
3. Audio signal generated per register settings.
No
1. VQ = VA/2.
2. Aout bias = VQ.
1. LRCK valid.
2. SCLK valid.
3. Audio samples
processed.
Sub-Clocks Applied
Normal Operation
2000 LRCK delay
PDN bit = '1'b?
MCLK/LRCK
1. VQ = VA/2.
2. Aout bias = VA/2 + last audio sample.
3. No audio signal generated.
Power-Up
Ratio?
Valid
Yes
No
ERROR: MCLK removed
Analog Output Freeze
Yes
1. VQ = VA/2.
2. Aout bias = Hi-Z.
3. No audio signal generated.
4. Control Port Registers retain
settings.
PDN bit set
to '1'b
Power-Down
CS42438
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