CS42516-DQZ Cirrus Logic Inc, CS42516-DQZ Datasheet - Page 68

• Manufacturer Part Number: CS42516-DQZ
• Description: IC CODEC S/PDIF RCVR 64LQFP
• Manufacturer: Cirrus Logic Inc
• Type: Receiverr

Specifications of CS42516-DQZ

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 2 / 6
• Sigma Delta: Yes
• Dynamic Range, Adcs / Dacs (db) Typ: 110 / 114
• Voltage - Supply, Analog: 4.75 V ~ 5.25 V
• Voltage - Supply, Digital: 3.13 V ~ 5.25 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 64-LQFP
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 6
• No. Of Input Channels: 2
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 110dB
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 598-1502 - BOARD EVAL FOR CS42518 CODEC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 598-1617

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6.25.3 PLL LOCK STATUS (UNLOCK)
6.25.4 RECEIVED VALIDITY (V)
6.25.5 RECEIVED CONFIDENCE (CONF)
6.25.6 BI-PHASE ERROR (BIP)
6.25.7 PARITY STATUS (PAR)
6.26
Reserved
7
Receiver Errors Mask (address 27h)
Default = x
0 - Data is valid and is normally linear coded PCM audio
1 - Data is invalid, or may be valid compressed audio
Function:
Default = x
0 - No error
1 - Confidence error. The logical OR of UNLOCK and BIP. The input data stream may be near an error
condition due to jitter.
Function:
Default = x
0 - No error
1 - Bi-phase error. This indicates an error in the received bi-phase coding.
Function:
Default = x
0 - No error
1 - Parity Error
Function:
Default = 00000000
Function:
Default = x
0 - PLL locked
1 - PLL out of lock
Function:
Indicates the lock status of the PLL.
Indicates the received validity status. This bit is updated on sub-frame boundaries.
Indicates the received confidence status. This bit is updated on sub-frame boundaries.
Indicates a bi-phase coding error. This bit is updated on sub-frame boundaries.
Indicates the Parity status. This bit is updated on sub-frame boundaries.
The bits in this register serve as masks for the corresponding bits of the Receiver Errors register. If a
mask bit is set to 1, the error is unmasked, meaning that its occurrence will appear in the receiver
errors register, will affect the RERR interrupt, and will affect the current audio sample according to
QCRCM
6
CCRCM
5
UNLOCKM
4
VM
3
CONFM
2
BIPM
1
CS42516
PARM
DS583F1
0