SGTL5000XNLA3 Freescale Semiconductor, SGTL5000XNLA3 Datasheet - Page 67

• Manufacturer Part Number: SGTL5000XNLA3
• Description: IC AUDIO CODEC STEREO 20-QFN
• Manufacturer: Freescale Semiconductor
• Type: Stereo Audior

Specifications of SGTL5000XNLA3

• Data Interface: I²C, Serial, SPI™
• Number Of Adcs / Dacs: 1 / 1
• Sigma Delta: No
• S/n Ratio, Adcs / Dacs (db) Typ: 90 / 100
• Voltage - Supply, Analog: 1.62 V ~ 3.6 V
• Voltage - Supply, Digital: 1.1 V ~ 2 V, 1.62 V ~ 3.6 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 20-UFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

SGTL5000 EA2 DS-0-3
BITS
10
11
9
8
7
6
5
4
3
2
LINREG_D_POW
VCOAMP_POWE
CAPLESS_HEAD
PHONE_POWER
VDDC_CHRGPM
VAG_POWERUP
DAC_POWERUP
REFTOP_POWE
PLL_POWERUP
HEADPHONE_P
P_POWERUP
ADC_MONO
OWERUP
FIELD
ERUP
RUP
RUP
UP
RW RESET
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
0x0
0x0
0x0
0x0
0x0
0x1
0x1
0x0
0x0
0x0
Power up the VDDC chargepump block. If neither VDDA or
VDDIO is 3V or larger this bit should be cleared before analog
blocks are powered up.
0x0 = Power down
0x1 = Power up
Note that for charge pump to function, either the PLL must be
powered on and programmed correctly (refer to
CHIP_CLK_CTRL->MCLK_FREQ description) or the internal
oscillator (set CLK_TOP_CTRL->ENABLE_INT_OSC) must
be enabled
PLL Power Up
0x0 = Power down
0x1 = Power up
When cleared, the PLL will be turned off. This must be set
before CHIP_CLK_CTRL -> MCLK_FREQ is programmed to
0x3. The CHIP_PLL_CTRL register must be configured
correctly before setting this bit.
Power up the primary VDDD linear regulator.
0x0 = Power down
0x1 = Power up
Power up the PLL VCO amplifier.
0x0 = Power down
0x1 = Power up
Power up the VAG reference buffer. Setting this bit starts the
power up ramp for the headphone and lineout. The
headphone (and/or lineout) powerup should be set BEFORE
clearing this bit. When this bit is cleared the powerdown ramp
is started. The headphone (and/or lineout) powerup should
stay set until the VAG is fully ramped down (200-400ms after
clearing this bit).
0x0 = Power down
0x1 = Power up
While ADC_POWERUP is set, this allows the ADC to be put
into left only mono operation for power savings. This mode is
useful when only using the microphone input.
0x0 = Mono (left only)
0x1 = Stereo
Power up the reference bias currents
0x0 = Power down
0x1 = Power up
This bit can be cleared when the part is is a sleep state to
minimize analog power.
Power up the headphone amplifiers
0x0 = Power down
0x1 = Power up
Power up the DACs
0x0 = Power down
0x1 = Power up
Power up the capless headphone mode
0x0 = Power down
0x1 = Power up
DEFINITION
SGTL5000
67