MAX9853ETM+T Maxim Integrated Products, MAX9853ETM+T Datasheet - Page 39

IC CODEC AUDIO STEREO 48TQFN

MAX9853ETM+T

Manufacturer Part Number
MAX9853ETM+T
Description
IC CODEC AUDIO STEREO 48TQFN
Manufacturer
Maxim Integrated Products
Type
Stereo Audior
Datasheet

Specifications of MAX9853ETM+T

Data Interface
Serial
Resolution (bits)
18 b
Number Of Adcs / Dacs
2 / 2
Sigma Delta
Yes
S/n Ratio, Adcs / Dacs (db) Typ
81.5 / 88
Dynamic Range, Adcs / Dacs (db) Typ
82 / 87.5
Voltage - Supply, Analog
2.6 V ~ 3.3 V
Voltage - Supply, Digital
1.7 V ~ 3.3 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
The MAX9851/MAX9853 feature extensive signal-path
mixing, allowing nearly any combination of inputs and
outputs.
Use MIXDAL and MIXDAR (register 0x08–see the I
Registers and Bit Descriptions section for detailed reg-
ister definitions) to configure the digital mixer at the
input of each DAC. The mixer allows signals from each
digital audio interface to be mixed prior to conversion,
regardless of sampling rate and synchronization. Each
left and right data stream can be routed independently
to either the left or right DAC to allow for swapping of
the left and right channels and any possible combina-
tion of digital signals.
Configure MXOUTL and MXOUTR (register 0x0B–see the
I
register definitions) to adjust the analog output mixer. This
mixer combines signals prior to the analog output stages:
consisting of the headphone amplifier, receiver amplifier,
and speaker or line amplifiers. Each line input, in addition
to the analog sidetone, can be mixed with the left or right
DAC output prior to amplification.
Use MXINL and MXINR (register 0x0A–see the I
Registers and Bit Descriptions section for detailed reg-
ister definitions) to configure the ADC mixer. Each
ADC has the option of converting the left microphone
signal, the right microphone signal, and each of the
line inputs. This allows for maximum flexibility when
recording input signals.
The DirectDrive headphone and receiver outputs of the
MAX9851/MAX9853 require a charge pump to create
an internal negative power supply. Set CPEN = 1 (reg-
2
Stereo Audio CODECs with Microphone, DirectDrive
C Registers and Bit Descriptions section for detailed
Headphones, Speaker Amplifiers, or Line Outputs
______________________________________________________________________________________
Signal Routing
Charge Pump
Audio Outputs
DAC Inputs
ADC Inputs
2
2
C
C
ister 0x1A, bit B4) to turn on the charge pump. The
negative charge-pump voltage is established and the
audio outputs are ready for use approximately 70ms
after CPEN is set to 1. The state of CPCLK (register
0x1A, bit B0) determines whether the charge-pump
oscillator is derived from the internal 650kHz oscillator
or from the MCLK. Set LFEN = 1, CPEN = 1 and set
CPCLK = 0 (register 0x1A, Bits B5, B4 and B0) to
enable the charge pump using the internal oscillator.
The charge pump runs independent from MCLK when
the internal oscillator is enabled allowing the charge
pump to operate when the DAC is disabled or when
only the line inputs are used. Set CPCLK = 1 to syn-
chronize the charge pump with the MCLK. The switch-
ing frequency of the charge pump is well beyond the
audio range and does not interfere with audio signals.
The switch drivers utilize techniques that minimize
noise generated by turn-on and turn-off transients.
Although not typically required, additional high-fre-
quency noise attenuation can be achieved by increas-
ing the size of C2 and the CPV
(see the Functional Diagrams/Typical Operating Circuits).
The MAX9851/MAX9853 feature comprehensive head-
set detection to accommodate a wide variety of head-
sets. Two operating modes are provided: one for
wake-up upon headset insertion and one for detecting
the configuration of the headset in use. While in sleep
mode, the detection circuitry can be used to detect the
insertion of a headset and trigger a hardware interrupt.
In this mode, the circuitry can be powered directly from
the battery using minimal power. When a headset is
inserted, the microcontroller (µC) can detect the hard-
ware interrupt and bring the system out of low-power
standby. The µC can then determine the configuration
of the inserted headset and appropriately configure the
MAX9851/MAX9853. Figure 8 shows the headset
detection circuitry.
DD
Headset Detect
bypass capacitor
39

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