MAX1455AAE-T Maxim Integrated Products, MAX1455AAE-T Datasheet - Page 12

• Manufacturer Part Number: MAX1455AAE-T
• Description: Board Mount Temperature Sensors Automotive Sensor Signal Conditioner
• Manufacturer: Maxim Integrated Products

Specifications of MAX1455AAE-T

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

All communication commands into the MAX1455 follow
the format of a start bit, 8 command bits (command
byte), and a stop bit. The Command Byte controls the
Low-Cost Automotive Sensor Signal
Conditioner
Table 6. PGA Gain Setting (PGA[3:0])
12
Table 5. Configuration Register (CONFIG[15:0])
FIELD
15:13
12:11
______________________________________________________________________________________
8:6
5:2
10
9
1
0
PGA[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
Serial Interface Command Format
ODAC Sign
PGA Sign
OSC[2:0]
CLIP[1:0]
PGA[3:0]
OTCDAC
IRO Sign
IRO[2:0]
NAME
Sign
Input-referred coarse-offset adjustment (Table 7).
Programmable-gain amplifier setting.
Logic 1 for positive offset TC DAC output. Logic 0 for negative offset TC DAC output.
Oscillator frequency setting. Factory preset; do not change.
Sets output clip levels.
Logic 1 inverts INM and INP polarity (Table 6).
Logic 1 for positive input-referred offset (IRO). Logic 0 for negative IRO.
Logic 1 for positive offset DAC output. Logic 0 for negative offset DAC output.
PGA GAIN (V/V)
104
117
130
143
156
169
182
195
208
221
234
39
52
65
78
91
contents of the IRS and comprises a 4-bit interface reg-
ister set address (IRSA) nibble and a 4-bit interface
register set data (IRSD) nibble. The IRS Command Byte
is structured as follows:
All commands are transmitted LSB first. The first bit fol-
lowing the start bit is IRSA[0] and the last bit before the
stop bit is IRSD[3] as follows:
Half of the register contents of the IRS are used for data
hold and steering information. Data writes to two loca-
tions within the IRS cause immediate action (command
execution). These locations are at addresses 9 and 15
and are the Command Register to Internal Logic (CRIL)
and reinitialize commands, respectively. Table 9 shows
a full listing of IRS address decoding.
Command sequences can be written to the MAX1455
as a continuous stream, i.e., start bit, command byte,
stop bit, start bit, command byte, stop bit, etc. There
are no delay requirements between commands while
the MAX1455 is receiving data.
A data write to the CRIL location (IRS address 9) causes
immediate execution of the command associated with
the 4-bit data nibble written. All EEPROM and Calibration
register read and write, together with EEPROM erase,
commands are handled through the CRIL location. CRIL
is also used to enable the MAX1455 analog output and
to place output data (serial digital output) on DIO. Table
10 shows a full listing of CRIL commands.
1 1 1 1 1 0 0 1 2 3 0 1 2 3 1 1 1 1 1 1
DESCRIPTION
Command Register to Internal Logic
IRS[7:0] = IRSD[3:0], IRSA[3:0]
IRSA
IRSD