AD1987JCPZ-RL Analog Devices Inc, AD1987JCPZ-RL Datasheet - Page 10

• Manufacturer Part Number: AD1987JCPZ-RL
• Description: IC CODEC HD AUD SOUNMAX 48-LFCSP
• Manufacturer: Analog Devices Inc
• Series: SoundMAX®r
• Type: Audio Codec, HDr

Specifications of AD1987JCPZ-RL

• Data Interface: Serial
• Resolution (bits): 24 b
• Number Of Adcs / Dacs: 4 / 8
• Sigma Delta: No
• Voltage - Supply, Analog: 3.13 V ~ 3.46 V
• Voltage - Supply, Digital: 2.97 V ~ 3.63 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 48-VFQFN, CSP Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

AD1987
Table 5. AD1987 Pin Descriptions
Mnemonic
DIGITAL INTERFACE
DIGITAL I/O
JACK SENSE
ANALOG I/O
FILTER/REFERENCE
The symbols used in this table are defined as: I = Input, O = Output, LI = Line level input, LO = Line level output, HP = Output capable of driving
headphone load, MIC = Input supports microphones with MIC bias and boost amplifier, SWAP = Outputs can swap L/R channels (typically used
to support C/LFE or shared C/LFE function).
SDATA_OUT
BIT_CLK
SDATA_IN
SYNC
RESET
GPIO_0
GPIO_1/EAPD
S/PDIF_OUT
SENSE_A/SRC_B
SENSE_B/SRC_A
PCBEEP
PORT-E_L
PORT-E_R
PORT-F_L
PORT-F_R
CD_L
CD_GND
CD_R
PORT-B_L
PORT-B_R
PORT-C_L
PORT-C_R
PORT-D_L
PORT-D_R
PORT-A_L
MONO_OUT
PORT-A_R
PORT-G_L
PORT-G_R
PORT-H_L
PORT-H_R
MIC_BIAS-B
MIC_BIAS-C
MIC_BIAS-E
V
MIC_BIAS-A
DV
REF
CORE
_FLT
Pin No.
5
6
8
10
11
2
47
48
13
34
12
14
15
16
17
18
19
20
21
22
23
24
35
36
39
40
41
43
44
45
46
28
29
31
27
37
1
Function
I
I
I/O
I
I
I/O
I/O
O
I/O
I/O
LI
LI, MIC, LO, SWAP
LI, MIC, LO, SWAP
LO
LO
LI
LI
LI
LI, MIC, HP, LO
LI, MIC, HP, LO
LI, MIC, LO
LI, MIC, LO
LI, HP, LO
LI, HP, LO
LI, MIC, HP, LO
LO
LI, MIC, HP, LO
LO, SWAP
LO, SWAP
LO
LO
O
O
O
O
O
O
Rev. A | Page 10 of 20 | March 2008
Description
Link Serial Data Output. Clocked on both edges of BIT_CLK.
Link Bit Clock. 24.000 MHz serial data clock.
Link Serial Data Input. AD1987 output stream clocked only on one edge of BIT_CLK.
Link Frame Sync.
Link Reset. Master hardware reset.
General-Purpose Input/Output Pin. Digital signal used to control external circuitry.
General-Purpose Input/Output Pin/EAPD Pin. Digital signal used to control external
circuitry. By default pin is in a high-Z state. When used as EAPD: high-Z = amp on,
DV
S/PDIF_OUT. Supports S/PDIF output.
JACK Sense A-D Input/Sense B Drive.
JACK Sense E-H Input/Sense A Drive.
Monaural Input From System for Analog PCBeep.
Auxiliary Input/Output Left Channel.
Auxiliary Input/Output Right Channel.
Auxiliary Input/Output Left Channel.
Auxiliary Input/Output Right Channel.
CD Audio Left Channel.
CD-Audio-Analog-Ground-Reference (for Differential CD Input). Must be connected
to AGND via 0.1 μF capacitor if not in use as CD_GND.
CD Audio Right Channel.
Front Panel Stereo MIC/Line-In.
Front Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Rear Panel Stereo MIC/Line-In.
Rear Panel Headphone/Line-Out.
Rear Panel Headphone/Line-Out.
Front Panel Headphone/Line-Out.
Monaural Output to Internal Speaker or Telephony Subsystem Speakerphone.
Front Panel Headphone/Line-Out.
Rear Panel C/LFE Output.
Rear Panel C/LFE Output.
Rear Panel Surround Center/Side.
Rear Panel Surround Center/Side.
Switchable Microphone Bias. For use with Port B (Pins 21, 22).
Switchable Microphone Bias. For use with Port C (Pins 23, 24).
Switchable Microphone Bias. For use with Port E (Pins 14, 15).
Voltage Reference Filter.
Switchable Microphone Bias. For use with Port A (Pins 39, 41)
All MIC_BIAS pins are capable of:
CAUTION: DO NOT APPLY 3.3 V TO THIS PIN!
Filter connection for internal core voltage regulator.
This pin must be connected to filter caps: 10 μF, 1.0 μF, and 0.1 μF connected in
parallel between Pin 1 and DV
SS
High-Z, 0 V, 1.65 V, 3.78 V, and 3.95 V (with 5.0 V on Pin 33)
High-Z, 0 V, 1.65 V, 2.86 V, and 3.00 V (with 3.3 V on Pin 33).
= amp off.
SS
(Pin 4).