Z8523316ASG Zilog, Z8523316ASG Datasheet - Page 10
![IC EMSCC/2 CMOS 16MHZ 44LQFP](/photos/28/19/281915/z8523316asg_sml.jpg)
Z8523316ASG
Manufacturer Part Number
Z8523316ASG
Description
IC EMSCC/2 CMOS 16MHZ 44LQFP
Manufacturer
Zilog
Series
EMSCC™r
Specifications of Z8523316ASG
Controller Type
Serial Communications Controller (SCC)
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Other names
269-4698
Z8523316ASG
Z8523316ASG
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
Z8523316ASG
Manufacturer:
Zilog
Quantity:
186
AC CHARACTERISTICS
Z85233 General Timing Table (Preliminary)
Notes:
[1] RxC is /RTxC or /TRxC, whichever is supplying the receive clock.
[2] TxC is /TRxC or /RTxC, whichever is supplying the transmit clock.
[3] Both /RTxC and /SYNC have 30 pF capacitors to ground connected to them.
[4] Synchronization of RxC to PCLK is eliminated in divide by four operation.
[5] Parameter applies only to FM encoding/decoding.
[6] Parameter applies only for transmitter and receiver; DPLL and baud rate generator timing requirements are identical to case PCLK requirements.
[7] The maximum receive or transmit data rate is 1/4 PCLK.
[8] Applies to DPLL clock source only. Maximum data rate of 1/4 PCLK still applies. DPLL clock should have a 50% duty cycle.
[9] Parameter applies only when WR7' D4 is set to '1'.
10
22
No
1a
1b
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16a
16b
17
18
19
20
21
TwSY
Symbol
TdPC(REQ)
TdPC(REQ)
TdPC(W)
TsRXC(PC)
TsRXD(RXCr)
ThRXD(RxCr)
TsRXD(RXCf)
ThRXD(RXCf)
TsSY(RXC)
ThSY(RXC)
TsTXC(PC)
TdTXCf(TXD)
TdTxCr(TXD)
TdTXD(TRX)
TwRTXh
TwRTXI
TcRTX
TxRX(DPLL)
TcRTXX
TwTRXh
TwTRXl
TcTRX
TwEXT
Parameter
/PCLK to W/REQ Valid
/PCLK to DTR/ REQ Valid
/PCLK to Wait Inactive
/RxC to /PCLK Setup Time
RxD to /RxC Setup Time
RxD to /RXC Hold Time
RxD to /RXC Setup Time
RXD to /RXC Hold Time
/SYNC to /RxC Setup Time
/SYNC to/RXC Hold Time
/TxC to /PCLK Setup Time
TxD to TRxC Delay
TRxC Low Width
RTxC Cycle Time
DPLL Cycle Time Min
Crystal Osc. Period
TRxC Low Width
TRxC Cycle Time
DCD or CTS Pulse Width
SYNC Pulse Width
/TxC to TxD Delay
/TxC to TxD Delay
RTxC High Width
TRxC High Width
5TcPc
-150
125
125
120
400
120
120
120
Min
120
100
120
400
NA
NA
50
0
0
10 MHz
1000
Max
200
200
300
150
150
140
NA
5TcPc
-100
244
244
Min
NA
NA
50
50
80
70
80
80
31
61
80
70
0
0
16 MHz
1000
Max
180
NA
80
80
80
80
80
Notes
[1,4]
[1,5]
[1,5]
[2,4]
[2,5]
[6,7]
[7,8]
[6,7]
[9]
[1]
[1]
[1]
[1]
[2]
[6]
[6]
[3]
[6]
[6]
CPS DC-4058-03
Z85233