DS21Q43AT Maxim Integrated Products, DS21Q43AT Datasheet - Page 19

IC FRAMER E1 QUAD 5V IND 128TQFP

DS21Q43AT

Manufacturer Part Number
DS21Q43AT
Description
IC FRAMER E1 QUAD 5V IND 128TQFP
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of DS21Q43AT

Controller Type
E1 Framer
Interface
Parallel/Serial
Voltage - Supply
4.5 V ~ 5.5 V
Current - Supply
32mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
128-TQFP, 128-VQFP
Dc
0319
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant

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CCR1: COMMON CONTROL REGISTER 1 (Address=14 Hex)
FRAMER LOOPBACK
When CCR1.7 is set to a 1, the DS21Q43A will enter a Framer LoopBack (FLB) mode. This loopback is
useful in testing and debugging applications. In FLB, the DS21Q43A will loop data from the transmit
side back to the receive side. When FLB is enabled, the following will occur:
1. data will be transmitted as normal at TPOS and TNEG
2. data at RPOS and RNEG will be ignored
3. the receive side signals become synchronous with TCLK instead of RCLK.
(MSB)
FLB
SYMBOL
RHDB3
THDB3
RCRC4
TCRC4
TG802
RG802
RSM
FLB
THDB3
POSITION
CCR1.7
CCR1.6
CCR1.5
CCR1.4
CCR1.3
CCR1.2
CCR1.1
CCR1.0
TG802
NAME AND DESCRIPTION
Framer Loopback.
0=loopback disabled
1=loopback enabled
Transmit HDB3 Enable.
0=HDB3 disabled
1=HDB3 enabled
Transmit G.802 Enable. See Section 11 for details.
0=do not force TCHBLK high during bit 1 of timeslot 26
1=force TCHBLK high during bit 1 of timeslot 26
Transmit CRC4 Enable.
0=CRC4 disabled
1=CRC4 enabled
Receive Signaling Mode Select.
0=CAS signaling mode
1=CCS signaling mode
Receive HDB3 Enable.
0=HDB3 disabled
1=HDB3 enabled
Receive G.802 Enable. See Section 11 for details.
0=do not force RCHBLK high during bit 1 of timeslot 26
1=force RCHBLK high during bit 1 of timeslot 26
Receive CRC4 Enable.
0=CRC4 disabled
1=CRC4 enabled
TCRC4
19 of 60
RSM
RHDB3
RG802
RCRC4
DS21Q43A
(LSB)

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