MCP2515T-E/SO Microchip Technology, MCP2515T-E/SO Datasheet
MCP2515T-E/SO
Specifications of MCP2515T-E/SO
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MCP2515T-E/SO Summary of contents
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... Extended (E): -40°C to +125°C 2004 Microchip Technology Inc. MCP2515 Description Microchip Technology’s MCP2515 is a stand-alone Controller Area Network (CAN) controller that imple- ments the CAN specification, version 2.0B capable of transmitting and receiving both standard and extended data and remote frames. The MCP2515 has ...
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... MCP2515 NOTES: DS21801C-page 2 Preliminary 2004 Microchip Technology Inc. ...
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... TXCAN OSC1 Timing OSC2 Generation CLKOUT 2004 Microchip Technology Inc. 1.2 Control Logic The control logic block controls the setup and operation of the MCP2515 by interfacing to the other blocks in order to pass information and control. Interrupt pins are provided to allow greater system flexibility ...
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... V DD General purpose digital input. 100 k internal pull- General purpose digital input. 100 k internal pull- — External clock input General purpose digital output General purpose digital output — — — — — — — 2004 Microchip Technology Inc. ...
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... FIGURE 1-3: CAN BUFFERS AND PROTOCOL ENGINE BLOCK DIAGRAM BUFFERS TXB0 TXB1 Message Queue Control Transmit Byte Sequencer PROTOCOL ENGINE {Transmit<5:0>, Receive<8:0>} Transmit Logic TX 2004 Microchip Technology Inc. Acceptance Mask A RXM0 TXB2 c c Acceptance Filter e RXF0 p Acceptance Filter t RXF1 R X ...
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... SAM StuffReg<5:0> Comparator Shift<14:0> (Transmit<5:0>, Receive<7:0>) Transmit<7:0> TrmData<7:0> Preliminary (TEC), are incremented and TX Transmit Logic REC Receive Error Counter TEC Transmit ErrPas Error Counter BusOff Protocol SOF FSM Rec/Trm Addr. 2004 Microchip Technology Inc. ...
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... CAN frame (11-bit identifier), the standard 2004 Microchip Technology Inc. CAN frame will win arbitration due to the assertion of a dominant lDE bit. Also, the SRR bit in an extended ...
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... Intermission. This allows nodes time for internal processing before the start of the next message frame. After the intermission, the bus line remains in the recessive state (bus idle) until the next transmission starts. Preliminary 2004 Microchip Technology Inc. an illegal condition. ...
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... FIGURE 2-1: STANDARD DATA FRAME 2004 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID Start-of-Frame Preliminary MCP2515 DS21801C-page 9 ...
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... MCP2515 FIGURE 2-2: EXTENDED DATA FRAME DS21801C-page 10 Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Start-Of-Frame Preliminary 2004 Microchip Technology Inc. ...
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... FIGURE 2-3: REMOTE FRAME 2004 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 bits Reserved RB1 RTR EID0 EID17 IDE SRR ID0 ID3 ID10 Start-Of-Frame Preliminary MCP2515 DS21801C-page 11 ...
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... MCP2515 FIGURE 2-4: ACTIVE ERROR FRAME Start-Of-Frame DS21801C-page 12 DLC0 DLC3 RB0 Bit Reserved IDE RTR ID0 ID3 10 ID Preliminary 2004 Microchip Technology Inc. ...
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... FIGURE 2-5: OVERLOAD FRAME 2004 Microchip Technology Inc. Del ACK Bit Slot Ack Del CRC DLC0 DLC3 RB0 IDE RTR ID0 10 ID Start-Of-Frame Preliminary MCP2515 DS21801C-page 13 ...
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... MCP2515 NOTES: DS21801C-page 14 Preliminary 2004 Microchip Technology Inc. ...
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... TXBnCTRL.TXP<1:0> for a particular message buffer is set to 11, that buffer has the highest possible priority. If TXBnCTRL.TXP<1:0> for a particular message buffer is 00, that buffer has the lowest possible priority. 2004 Microchip Technology Inc. 3.3 Initiating Transmission In order to initiate message transmission, the TXBnCTRL.TXREQ bit must be set for each buffer to be transmitted. This can be accomplished by: • ...
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... Note: Messages that are currently transmitting when the abort was requested will continue to transmit. If the message does not successfully complete transmission (i.e., lost arbitration or was interrupted by an error frame), it will then be aborted. Preliminary 2004 Microchip Technology Inc. clearing the associated ...
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... CANTINF.TXnIF The CANINTE.TXnIE bit determines if an interrupt should be generated when a message is successfully transmitted. GOTO START 2004 Microchip Technology Inc. Start The message transmission sequence begins when the device determines that the TXBnCTRL.TXREQ for any of the transmit registers has been set. ...
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... R = Readable bit -n = Value at POR DS21801C-page 18 R-0 R-0 R-0 R/W-0 MLOA TXERR TXREQ W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary U-0 R/W-0 R/W-0 — TXP1 TXP0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... R/W-x R/W-x SID10 SID9 bit 7 bit 7-0 SID: Standard Identifier bits <10:3> Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. U-0 R-x R-x R-x — B2RTS B1RTS B0RTS W = Writable bit U = Unimplemented bit, read as ‘0’ ...
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... W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-x R/W-x EID17 EID16 bit Bit is unknown R/W-x R/W-x EID9 EID8 bit Bit is unknown R/W-x R/W-x EID1 EID0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... R/W-x TXBnDm TXBnDm 7 bit 7 bit 7-0 TXBnD 7:TXBnD M Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R/W-x R/W-x R/W-x RTR — — DLC3 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared R/W-x ...
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... MCP2515 NOTES: DS21801C-page 22 Preliminary 2004 Microchip Technology Inc. ...
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... In addition, the associated RXnBF pin will drive low if configured as a receive buffer full pin. See Section 4.4 “RX0BF and RX1BF Pins” for details. 2004 Microchip Technology Inc. 4.2 Receive Priority RXB0, the higher priority buffer, has one mask and two message acceptance filters associated with it ...
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... MCU, the corresponding interrupt pin will go to the logic-high state until the next message is loaded into the receive buffer. START-OF-FRAME BIT Sample Point Expected Sample Point Preliminary or as standard digital outputs. ID BIT BUS IDLE 2004 Microchip Technology Inc. ...
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... RXF0 and RXF2, the match will be for RXF0 and the message will be moved into RXB0 2004 Microchip Technology Inc. TABLE 4-1: BnBFE BnBFM BnBFS Acceptance Mask Acceptance Filter Acceptance Mask ...
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... Set RXBF0 Pin = 0 Pin = Preliminary Meets Yes a filter criteria for RXB1 Start CANINTF.RX1IF = ? Yes Move message into RXB1 Set CANINTF.RX1IF = 1 Set RXB0CTRL.FILHIT <2:0> according to which filter criteria was met Yes 1 CANINTE.RX1IE = ? No Are 1 Yes BFPCTRL.B1BFM = and 0 1 BF1CTRL.B1BFE = ? No 2004 Microchip Technology Inc. ...
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... Acceptance Filter 1 (RXF1 Acceptance Filter 0 (RXF0) Note rollover from RXB0 to RXB1 occurs, the FILHIT bit will reflect the filter that accepted the message that rolled over. Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R/W-0 U-0 R-0 R/W-0 RXM0 — RXRTR ...
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... R = Readable bit -n = Value at POR DS21801C-page 28 R/W-0 U-0 R-0 R-0 RXM0 — RXRTR FILHIT2 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R-0 R-0 FILHIT1 FILHIT0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... SID: Standard Identifier bits <10:3> These bits contain the eight most significant bits of the Standard Identifier for the received mes- sage Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. U-0 R/W-0 R/W-0 R/W-0 — B1BFS B0BFS ...
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... EID12 EID11 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary U-0 R-x R-x — EID17 EID16 bit Bit is unknown R-x R-x R-x EID10 EID9 EID8 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... RBnDm7 RBnDm6 bit 7 bit 7-0 RBnDm7:RBnDm0: Receive Buffer n Data Field Bytes m Eight bytes containing the data bytes for the received message Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R-x R-x R-x R-x EID5 EID4 EID3 W = Writable bit U = Unimplemented bit, read as ‘0’ ...
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... ID0 EID17 Standard Data Frame ID0 * Data Byte 0 16-bit data filtering * Preliminary FILTER/MASK TRUTH TABLE Message Accept or Filter Bit n Identifier Reject bit bit n Accept X X Accept 0 0 Reject 0 1 Reject 1 0 Accept 1 1 EID0 Data Byte 1 2004 Microchip Technology Inc. ...
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... RXFn Message Assembly Buffer Identifier 2004 Microchip Technology Inc. If the BUKT bit is clear, there are six codes corresponding to the six filters. If the BUKT bit is set, there are six codes corresponding to the six filters, plus two additional codes corresponding to RXF0 and RXF1 filters that roll over into RXB1 ...
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... R/W-x U-0 SID0 — EXIDE — Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-x R/W-x SID4 SID3 bit Bit is unknown R/W-x R/W-x EID17 EID16 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... SID: Standard Identifier Mask bits <10:3> These bits hold the mask bits to be applied to bits <10:3> of the Standard Identifier portion of a received message Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R/W-x R/W-x R/W-x R/W-x EID13 EID12 ...
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... W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-0 R/W-0 EID17 EID16 bit Bit is unknown R/W-0 R/W-0 EID9 EID8 bit Bit is unknown R/W-0 R/W-0 EID1 EID0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... DPLL. FIGURE 5-1: CAN BIT TIME SEGMENTS SyncSeg PropSeg 2004 Microchip Technology Inc. 5.1 The CAN Bit TIme All devices on the CAN bus must use the same bit rate. However, all devices are not required to have the same master oscillator clock frequency ...
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... Baud Rate Prescaler (BRP). This is illustrated in the following equation: EQUATION 5- BRP T OSC Where: BRP equals the configuration as shown in Register 5-1. PS2 PS1 (Programmable) (Programmable) CAN Bit Time Preliminary 2004 Microchip Technology Inc. IPT = 2TQ with the transmitted 2 BRP = ------------------ - F OSC ...
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... SAMPLE POINT (TQ is added to PS1). • e < the edge lies after the SAMPLE POINT of the previous bit (TQ is subtracted from PS2). 2004 Microchip Technology Inc. 5.2.2.2 No Phase Error ( the magnitude of the phase error is less than or equal ...
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... No Resynchronization ( PhaseSeg1 (PS1) Nominal Bit Time (NBT) Actual Bit Time PhaseSeg1 (PS1) Sample Point Nominal Bit Time (NBT) Actual Bit Time Preliminary PhaseSeg2 (PS2) SJW (PS2) PhaseSeg2 (PS2) SJW (PS2) Sample Point PhaseSeg2 (PS2) SJW (PS2) 2004 Microchip Technology Inc. ...
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... For the full bus speed range of the CAN protocol, a quartz oscillator is required. A maximum node-to-node oscillator variation of 1.7% is allowed. 2004 Microchip Technology Inc. 5.5 Bit Timing Configuration Registers The configuration registers (CNF1, CNF2, CNF3) control the bit timing for the CAN bus interface ...
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... PHSEG12 PHSEG11 PHSEG10 ) Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-0 R/W-0 R/W-0 BRP2 BRP1 BRP0 bit Bit is unknown R/W-0 R/W-0 R/W-0 PRSEG2 PRSEG1 PRSEG0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... Unimplemented: Reads as ‘0’ bit 2-0 PHSEG2: PS2 Length bits<2:0> (PHSEG2 + Note: Minimum valid setting for PS2 Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. U-0 U-0 U-0 — — — Writable bit U = Unimplemented bit, read as ‘0’ ...
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... MCP2515 NOTES: DS21801C-page 44 Preliminary 2004 Microchip Technology Inc. ...
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... A stuff error occurs and an error frame is generated. The message is repeated. 2004 Microchip Technology Inc. 6.6 Error States Detected errors are made known to all other nodes via error frames ...
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... U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary 128 occurrences of 11 consecutive “recessive” bits R-0 R-0 R-0 TEC2 TEC1 TEC0 bit Bit is unknown R-0 R-0 R-0 REC2 REC1 REC0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... EWARN: Error Warning Flag bit - Set when TEC or REC is equal to or greater than 96 (TXWAR or RXWAR = 1) Reset when both REC and TEC are less than 96 - Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R-0 R-0 R-0 R-0 TXBO TXEP RXEP ...
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... MCP2515 NOTES: DS21801C-page 48 Preliminary 2004 Microchip Technology Inc. ...
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... ERR•WAK•TX0•TX1•TX2•RX0 110 ERR•WAK•TX0•TX1•TX2•RX0•RX1 111 Note: ERR is associated with CANINTE,ERRIE. 2004 Microchip Technology Inc. 7.2 Transmit Interrupt When the transmit (CANINTE.TXnIE = 1), an interrupt will be generated on the INT pin once the associated transmit buffer becomes empty and is ready to be loaded with a new message ...
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... MCU until the interrupt condition is removed. R/W-0 R/W-0 R/W-0 R/W-0 ERRIE TX2IE TX1IE TX0IE W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-0 R/W-0 RX1IE RX0IE bit Bit is unknown 2004 Microchip Technology Inc. ...
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... Interrupt pending (must be cleared by MCU to reset interrupt condition interrupt pending bit 0 RX0IF: Receive Buffer 0 Full Interrupt Flag bit 1 = Interrupt pending (must be cleared by MCU to reset interrupt condition interrupt pending Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R/W-0 R/W-0 R/W-0 R/W-0 ERRIF TX2IF TX1IF TX0IF W = Writable bit U = Unimplemented bit, read as ‘ ...
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... MCP2515 NOTES: DS21801C-page 52 Preliminary 2004 Microchip Technology Inc. ...
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... Clock from external system Note 1: A resistor to ground may be used to reduce system noise. This may increase system current. 2: Duty cycle restrictions must be observed (see Table 12-2). 2004 Microchip Technology Inc. 8.2 CLKOUT Pin The CLKOUT pin is provided to the system designer for use as the main system clock clock input for other devices in the system ...
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... MCP2515 FIGURE 8-3: EXTERNAL SERIES RESONANT CRYSTAL OSCILLATOR CIRCUIT 330 k 74AS04 Note 1: Duty cycle restrictions must be observed (see Table 12-2). DS21801C-page 54 330 k 74AS04 74AS04 0.1 mF XTAL Preliminary To Other Devices MCP2510 OSC1 2004 Microchip Technology Inc. ...
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... RESET PIN CONFIGURATION EXAMPLE V DD Note 1: The diode D helps discharge the capacitor quickly when will limit any current flowing into RESET from external capacitor C, in the event of RESET pin breakdown due to Electrostatic Discharge (ESD) or Electrical Overstress (EOS). 2004 Microchip Technology Inc. reaches ...
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... MCP2515 NOTES: DS21801C-page 56 Preliminary 2004 Microchip Technology Inc. ...
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... Sleep mode and use the MCP2515 to wake it up upon detecting activity on the bus. 2004 Microchip Technology Inc. When in Sleep mode, the MCP2515 stops its internal oscillator. The MCP2515 will wake-up when bus activ- ity occurs or when the MCU sets, via the SPI interface, the CANINTF.WAKIF bit to ‘ ...
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... REQOP0 ABAT OSM = System Clock/1 = System Clock/2 = System Clock/4 = System Clock Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘0’ = Bit is cleared Preliminary R/W-1 R/W-1 R/W-1 CLKEN CLKPRE1 CLKPRE0 bit Bit is unknown 2004 Microchip Technology Inc. ...
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... TXB1 Interrupt 101 = TXB2 Interrupt 110 = RXB0 Interrupt 111 = RXB1 Interrupt bit 0 Unimplemented: Read as ‘0’ Legend Readable bit -n = Value at POR 2004 Microchip Technology Inc. R-0 R-0 U-0 R-0 — ICOD2 W = Writable bit U = Unimplemented bit, read as ‘0’ ‘1’ = Bit is set ‘ ...
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... MCP2515 NOTES: DS21801C-page 60 Preliminary 2004 Microchip Technology Inc. ...
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... RXM1 RXB1CTRL 70 — RSM1 2004 Microchip Technology Inc. reading and writing of data. Some specific control and status registers allow individual bit modification using the SPI Bit Modify command. The registers that allow this command are shown as shaded locations in Table 11-1. A summary of the MCP2515 control regis- ters is shown in Table 11-2 ...
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... MCP2515 NOTES: DS21801C-page 62 Preliminary 2004 Microchip Technology Inc. ...
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... Once the command byte is sent, the controller clocks out the data at the address location the same as 2004 Microchip Technology Inc. the Read instruction (i.e., sequential reads are possible). This instruction further reduces the SPI overhead by automatically clearing the associated receive flag (CANINTF ...
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... Note: Not all registers can be bit-modified with this command. Executing this command on registers that are not bit-modifiable will force the mask to FFh. See the register map in Section 11.0 “Register Map” for a list of the registers that apply. Preliminary 2004 Microchip Technology Inc ...
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... SCK instruction high-impedance SO FIGURE 12-3: READ RX BUFFER INSTRUCTION SCK instruction high-impedance SO FIGURE 12-4: BYTE WRITE INSTRUCTION SCK instruction 2004 Microchip Technology Inc address byte don’t care 0 data out address byte high-impedance Preliminary MCP2515 23 don’t care data out ...
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... high-impedance Preliminary Address Points to Addr buffer 0, Start at 0x31 TXB0SIDH buffer 0, Start at 0x36 TXB0D0 buffer 1, Start at 0x41 TXB1SIDH buffer 1, Start at 0x46 TXB1D0 buffer 2, Start at 0x51 TXB2SIDH buffer 2, Start at 0x56 TXB2D0 data byte 2004 Microchip Technology Inc. ...
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... SI high-impedance Received Message message 0 1 Message in RXB0 0 0 Message in RXB1 1 1 Messages in both buffers* 1 CANINTF.RXnIF bits are mapped to bits 7 and 6. * Buffer 0 has higher priority, therefore, RXB0 status is reflected in bits 4:0. 2004 Microchip Technology Inc don’t care 0 data out don’ ...
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... FIGURE 12-10: SPI™ INPUT TIMING CS 1 Mode 1,1 SCK Mode 0 MSB in SO FIGURE 12-11: SPI™ OUTPUT TIMING SCK 12 SO MSB out SI DS21801C-page high-impedance 13 don’t care Preliminary LSB in 2 Mode 1,1 Mode 0,0 14 LSB out 2004 Microchip Technology Inc. ...
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... Exposure to maximum rating conditions for extended periods may affect device reliability. 2004 Microchip Technology Inc. Preliminary MCP2515 +1 ...
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... CS = RESET = µA — AMB (Note 1) DD — 5.5V CLK — 5 µA CS, TXnRTS = — 8 µA CS, TXnRTS = Preliminary 2004 Microchip Technology Inc 2. 4.5V to 5.5V DD Conditions = 25° 1.0 MHz MHz, OSC = 1 MHz Open , Inputs tied -40°C +85°C SS ...
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... Characteristic No. Wake-up Noise Filter T WF TABLE 13-4: RESET AC CHARACTERISTICS RESET AC Characteristics Param. Sym Characteristic No. RESET Pin Low Time trl 2004 Microchip Technology Inc. Industrial (I -40°C to +85°C AMB Extended (E -40°C to +125°C AMB Min Max Units 1 40 MHz 4 ...
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... Measured from 0.7 V (Note 1) — 100 ns — Note 1 OSC — Measured from CAN bit sample OSC 0.5 T point. Device is a receiver. Q CNF1.BRP<5:0> (Note 2) 16 sample point 15 Preliminary 2004 Microchip Technology Inc 2. 4.5V to 5.5V DD Conditions = 40 ns (Note (Note ...
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... CLE 12 T Output Valid from Clock Low Output Hold Time Output Disable Time DIS Note 1: This parameter is not 100% tested. 2004 Microchip Technology Inc. Industrial (I -40°C to +85°C AMB Extended (E -40°C to +125°C AMB Min Max Units — 10 ...
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... MCP2515 NOTES: DS21801C-page 74 Preliminary 2004 Microchip Technology Inc. ...
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... In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line thus limiting the number of available characters for customer specific information. * Standard device marking consists of Microchip part number, year code, week code, and traceability code.. 2004 Microchip Technology Inc. Example: MCP2515-I/P 0434256 Example: MCP2515-E/SO ...
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... L p MILLIMETERS MIN NOM MAX 18 2.54 3.56 3.94 4.32 2.92 3.30 3.68 0.38 7.62 7.94 8.26 6.10 6.35 6.60 22.61 22.80 22.99 3.18 3.30 3.43 0.20 0.29 0.38 1.14 1.46 1.78 0.36 0.46 0.56 7.87 9.40 10. 2004 Microchip Technology Inc. ...
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... Mold Draft Angle Bottom * Controlling Parameter § Significant Characteristic Notes: Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side. JEDEC Equivalent: MS-013 Drawing No. C04-051 2004 Microchip Technology Inc Units INCHES* ...
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... B .007 .010 .012 Preliminary A2 MILLIMETERS* MIN NOM MAX 20 0.65 1.10 0.85 0.90 0.95 0.05 0.10 0.15 6.25 6.38 6.50 4.30 4.40 4.50 6.40 6.50 6.60 0.50 0.60 0. 0.09 0.15 0.20 0.19 0.25 0. 2004 Microchip Technology Inc. ...
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... Revision C (November 2004) The following is the list of modifications: 1. New section 9.0 added. 2. Section 12, Heading 12.1: added notebox. Heading 12.6: Changed verbiage paragraph. 3. Added Appendix A: Revision History. 2004 Microchip Technology Inc. condition within Preliminary MCP2515 DS21801C-page 79 ...
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... MCP2515 Notes: DS21801C-page 80 Preliminary 2004 Microchip Technology Inc. ...
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... MCP2515-E/P: b) MCP2515-I/P: c) MCP2515-E/SO: Extended temperature, d) MCP2515-I/SO: Industrial temperature, e) MCP2515T-I/SO: Tape and Reel, Industrial f) MCP2515-I/ST: Industrial temperature, g) MCP2515T-I/ST: Tape and Reel, Industrial Preliminary MCP2515 . Extended temperature, PDIP package. Industrial temperature, PDIP package. SOIC package. SOIC package. temperature, SOIC package. TSSOP package. temperature, TSSOP package ...
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... MCP2515 NOTES: DS21801C-page 82 Preliminary 2004 Microchip Technology Inc. ...
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... PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel and Total Endurance are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Taiwan - Hsinchu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Preliminary 2004 Microchip Technology Inc. EUROPE Austria - Weis Tel: 43-7242-2244-399 Fax: 43-7242-2244-393 Denmark - Ballerup Tel: 45-4450-2828 Fax: 45-4485-2829 France - Massy Tel: 33-1-69-53-63-20 ...