Z8523L10VSG Zilog, Z8523L10VSG Datasheet - Page 77
Z8523L10VSG
Manufacturer Part Number
Z8523L10VSG
Description
IC CTRL SCC 10MHZ 3.3V 44-PLCC
Manufacturer
Zilog
Datasheet
1.Z8523L10VEG.pdf
(118 pages)
Specifications of Z8523L10VSG
Controller Type
Serial Communications Controller (SCC)
Interface
Bus
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
2.5mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
44-LCC (J-Lead)
Product
I/O Controller
Operating Supply Voltage
- 0.3 V to 7 V
Supply Current (max)
9 mA
Maximum Operating Temperature
+ 70 C
Minimum Operating Temperature
0 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
269-4731
Available stocks
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Part Number
Manufacturer
Quantity
Price
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Z85230/L Timing
PS005308-0609
tor on A7-A0. WR9 bit 1 is set to 1 to disable the placing of a vector on a bus. The INT pin
also goes inactive in response to the falling edge of DS. There is only one DS per interrupt
acknowledge cycle.
IP bits in the Z80230 are updated by AS, which can delay interrupt requests if the proces-
sor does not supply AS strobes during the time in between accesses of the Z80230.
The ESCC generates internal control signals from WR and RD that relate to PCLK.
Because PCLK had no defined phase relationship with WR and RD, the circuitry generat-
ing the internal control signals provides time for metastable conditions to disappear. This
causes a recovery time related to PCLK. The recovery time applies only to bus transac-
tions involving the ESCC. The recovery time required for proper operation is specified
INTACK
A7–A0
CS0
IEO
INT
DS
AS
IEI
Figure 19. Z80230 Interrupt Acknowledge Cycle Timing
Product Specification
Vector
Z80230 Interface Timing
Z80230/Z85230/L
72
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