Z87L0116FSC Zilog, Z87L0116FSC Datasheet - Page 24

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Z87L0116FSC

Manufacturer Part Number
Z87L0116FSC
Description
IC FHSS PHONE CTRL 144-QFP
Manufacturer
Zilog
Datasheet

Specifications of Z87L0116FSC

Controller Type
Phone Controller
Interface
Bus
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
55mA
Operating Temperature
-20°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
144-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Z87001/Z87L01
ROMless Spread Spectrum Cordless Phone Controller
OPERATION
Automatic Frequency Control Loop
(Receiver) and Modulator
AFC Loop
The AFC loop consists of a bias estimator block, which de-
termines frequency offsets in the incoming signal, an
adder, to add this bias to the 460 kHz frequency control
word driving the NCO, and various interface points to the
DSP core processor. In particular, the DSP can read the
bias estimate data and substitute its own calculated bias
value to the NCO.
The bias estimator accumulates the discriminator output
values (image of instantaneous frequency) that exceed a
programmable threshold (BIAS_THRESHOLD). The pro-
cessor can freeze the bias calculation any time by reset-
ting the BIAS_ENABLE control bit.
24
Rx signal
Downconverter
NCO and bias
adder
460 kHz
+ bias
Figure 5. AFC Loop and Processor Control
Second down-
convertor,
Discriminator
P R E L I M I N A R Y
BIAS_ERROR_DATA
CORE_BIAS_DATA
USE_CORE_BIAS
BIAS_THRESHOLD
The accumulated bias, available in BIAS_ERROR_DATA,
can be used directly to correct the NCO frequency. Alter-
nately, the estimated bias can be read by the DSP, further
processed, and written to the CORE_BIAS_DATA field.
The DSP controls which value is used by setting the
USE_CORE_BIAS field. The selected value is added to
the 460 kHz signal which downconverts the receive IF sig-
nal.
The CORE_BIAS_DATA and BIAS_ERROR_DATA are
two’s complement numbers in units of 125 Hz.
In addition to correcting the difference in clock frequencies
on the receiver using the AFC loop, a Z87001-base system
can also modify the frequency of the remote transmit IF
signals. The software has access to this frequency through
the MOD_FREQ register fields.
Discriminator
Output
Bias estimator
“0”
BIAS_ENABLE
DSP Core
Processor
DS96WRL0800
Zilog

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