UPD720114GA-YEU-A Renesas Electronics America, UPD720114GA-YEU-A Datasheet

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UPD720114GA-YEU-A

Manufacturer Part Number
UPD720114GA-YEU-A
Description
HOST CTLR USB 2.0 48-TQFP
Manufacturer
Renesas Electronics America
Series
ECOUSB™r
Datasheet

Specifications of UPD720114GA-YEU-A

Controller Type
USB 2.0 Hub Controller
Interface
USB 2.0
Voltage - Supply
3.14 V ~ 3.46 V
Operating Temperature
0°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TQFP
Package Type
TQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Current - Supply
-
Lead Free Status / RoHS Status
Compliant, Lead free / RoHS Compliant
Other names
972-1000

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RENESAS
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UPD720114GA-YEU-A
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UPD720114GA-YEU-A/JC
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UPD720114GA-YEU-A/JC
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NEC
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Part Number:
UPD720114GA-YEU-AT
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20 000
Part Number:
UPD720114GA-YEU-AT
0
To our customers,
Corporation, and Renesas Electronics Corporation took over all the business of both
companies. Therefore, although the old company name remains in this document, it is a valid
Renesas Electronics document. We appreciate your understanding.
Issued by: Renesas Electronics Corporation (http://www.renesas.com)
Send any inquiries to http://www.renesas.com/inquiry.
On April 1
st
, 2010, NEC Electronics Corporation merged with Renesas Technology
Renesas Electronics website: http://www.renesas.com
Old Company Name in Catalogs and Other Documents
April 1
Renesas Electronics Corporation
st
, 2010

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UPD720114GA-YEU-A Summary of contents

Page 1

To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...

Page 2

All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...

Page 3

The PD720114 is a USB 2.0 hub device that complies with the Universal Serial Bus (USB) Specification Revision 2.0 and works up to 480 Mbps. USB 2.0 compliant transceivers are integrated for upstream and all downstream ports. μ The ...

Page 4

ORDERING INFORMATION Part Number μ 48-pin plastic TQFP (Fine pitch) (7 × 7) PD720114GA-9EU-A μ 48-pin plastic TQFP (Fine pitch) (7 × 7) PD720114GA-YEU-A μ 40-pin plastic QFN (6 × 6) <R> PD720114K9-4E4-A BLOCK DIAGRAM To Host/Hub downstream Upstream facing ...

Page 5

APLL : Generates all clocks of Hub. ALL_TT : Translates the high-speed transactions (split transactions) for full/low-speed device to full/low-speed transactions. upstream or downstream direction. For OUT transaction, ALL_TT buffers data from upstream port and sends it out to the ...

Page 6

PIN CONFIGURATION (TOP VIEW) • 48-pin plastic TQFP (Fine pitch) (7 × 7) μ PD720114GA-9EU-A μ PD720114GA-YEU-A V DD25OUT 1 V SSREG 2 LED4 3 LED3 4 LED2 5 LED1 6 GREEN 7 AMBER 8 V DD33 ...

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Pin No. Pin Name Pin No. Pin Name BUS_B DD25OUT TEST SSREG 3 LED4 15 RREF 4 LED3 LED2 LED1 GREEN AMBER ...

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QFN (6 × 6) <R> μ PD720114K9-4E4-A V DD25OUT LED4 LED3 LED2 LED1 GREEN AMBER V DD33 X1 X2 Pin No. Pin Name Pin No DD25OUT 2 LED4 12 3 LED3 13 4 LED2 ...

Page 9

PIN INFORMATION Pin Name I/O Buffer Type X1 I 2.5 V input X2 O 2.5 V output SYSRSTB I 3.3 V Schmitt input DP(4:1) I/O USB D+ signal I/O DM(4:1) I/O USB D− signal I/O DPU I/O USB D+ ...

Page 10

ELECTRICAL SPECIFICATIONS 2.1 Buffer List • 2.5 V Oscillator interface X1, X2 • tolerant Schmitt input buffer CSB1, VBUSM • 3.3 V Schmitt input buffer CSB(4:2),BUS_B, SYSRSTB, TEST • 3 output buffer ...

Page 11

Terminology Terms Used in Absolute Maximum Ratings Parameter Symbol Power supply voltage V , DD33 V DD33REG Input voltage V I Output voltage V O Output current I O Operating temperature T A Storage temperature T stg Terms Used ...

Page 12

Terms Used in DC Characteristics Parameter Symbol Off-state output leakage current I OZ Output short circuit current I OS Input leakage current I I Low-level output current I OL High-level output current Meaning Indicates the current that ...

Page 13

Electrical Specifications Absolute Maximum Ratings Parameter Symbol Power supply voltage V ,V DD33 DD33REG Input/output voltage 3.3 V input/output voltage 5 V input/out voltage Output current I O Operating temperature T A Storage temperature T ...

Page 14

DC Characteristics (V = 3. DD33 Control Pin Block Parameter Off-state output leakage current Output short circuit current Low-level output current 3.3 V low-level output current (3 mA) 3.3 V low-level output current (12 mA) High-level ...

Page 15

USB Interface Block Parameter Output pin impedance Termination voltage for upstream facing port pullup (full-speed) Input Levels for Low-/full-speed: High-level input voltage (drive) High-level input voltage (floating) Low-level input voltage Differential input sensitivity Differential common mode range Output Levels for ...

Page 16

Figure 2-1. Differential Input Sensitivity Range for Low-/full-speed -1.0 0.0 0.2 0.4 0.6 0.8 Figure 2-2. Full-speed Buffer V −3.3 −2 Min. Max. Figure 2-3. Full-speed Buffer 0.5 14 ...

Page 17

Figure 2-4. Receiver Sensitivity for Transceiver at DP/DM Level 1 Point 3 Point 1 Point 5 Level 2 0% Unit Interval Figure 2-5. Receiver Measurement Fixtures Test Supply Voltage 15.8 Ω USB V BUS Connector D+ Nearest D- 15.8 Ω ...

Page 18

Power Consumption Parameter Symbol Power Consumption P W-0 P W-2 P W-3 P W-4 P W-UNP P W_S Notes 1. Ports available but inactive or unplugged do not add to the power consumption. 2. The power consumption depends on the ...

Page 19

AC Characteristics (V = 3. DD33 Pin capacitance Parameter Input capacitance Output capacitance I/O capacitance System Clock Ratings Parameter Clock frequency Clock Duty cycle Remarks 1. Recommended accuracy of clock frequency is ± 100 ppm. 2. ...

Page 20

Over-current Response Timing Parameter Over-current response time from CSB low PPB high (Figure 2-7) Figure 2-7. Over-current Response Timing CSB(4:1) PPB(4:1) Hub power supply Bus reset Up port D+ line PPB pin output CSB pin input Port ...

Page 21

USB Interface Block Parameter Low-speed Electrical Characteristics Rise time (10% to 90%) Fall time (90% to 10%) Differential rise and fall time matching Low-speed data rate Downstream facing port source jitter total (including frequency tolerance) (Figure 2-13): To next transition ...

Page 22

Parameter Full-speed Electrical Characteristics (Continued) Consecutive frame interval jitter Source jitter total (including frequency tolerance) (Figure 2-13): To next transition For paired transitions Source jitter for differential transition to SE0 transition (Figure 2-14) Receiver jitter (Figure 2-15): To Next Transition ...

Page 23

Parameter Hub Event Timings Time to detect a downstream facing port connect event (Figure 2-17): Awake hub Suspended hub Time to detect a disconnect event at a hub’s downstream facing port (Figure 2-16) Duration of driving resume to a downstream ...

Page 24

Parameter Hub Event Timings (Continued) Resume recovery time Time to detect a reset from upstream for non high-speed capable devices Reset recovery time (Figure 2-18) Inter-packet delay for full-speed Inter-packet delay for device response with detachable cable for full-speed SetAddress() ...

Page 25

Figure 2-9. Transmit Waveform for Transceiver at DP/DM Level 1 Point 3 Point 1 Point 5 Level 2 Unit Interval 0% Figure 2-10. Transmitter Measurement Fixtures Test Supply Voltage 15.8 Ω USB V BUS Connector D+ Nearest D- 15.8 Ω ...

Page 26

Timing Diagram Figure 2-11. Hub Differential Delay, Differential Jitter, and SOP Distortion Upstream End of 50% Point of Cable Initial Swing V SS Hub Delay Downstream Downstream Port of Hub t HDD1 Downstream Hub Delay with Cable ...

Page 27

Figure 2-12. Hub EOP Delay and EOP Skew 50% Point of Initial Swing Upstream End of Cable EOP- EOP+ Downstream Port of Hub Downstream EOP Delay with Cable Downstream Port of Hub V ...

Page 28

Figure 2-13. USB Differential Data Jitter for Low-/full-speed t PERIOD Differential Data Lines Figure 2-14. USB Differential-to-EOP Transition Skew and EOP Width for Low-/full-speed t PERIOD Crossover Point Differential Data Lines Diff. Data-to- SE0 Skew N × t Figure 2-15. ...

Page 29

Figure 2-16. Low-/full-speed Disconnect Detection D+/D− V (min) IHZ V IL D−/ Device Disconnected Figure 2-17. Full-/high-speed Device Connect Detection Device Connected Figure 2-18. Power-on and Connection Events Timing Hub port Attatch detected ...

Page 30

PACKAGE DRAWINGS μ • PD720114GA-9EU-A 48-PIN PLASTIC TQFP (FINE PITCH) (7x7 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition ...

Page 31

PD720114GA-YEU-A 48-PIN PLASTIC TQFP (FINE PITCH)(7x7 NOTE Each lead centerline is located within 0. its true position at maximum material condition ...

Page 32

PD720114K9-4E4-A 40-PIN PLASTIC VQFN(6x6 ...

Page 33

RECOMMENDED SOLDERING CONDITIONS μ The PD720114 should be soldered and mounted under the following recommended conditions. For soldering methods and conditions other than those recommended below, contact an NEC Electronics sales representative. For technical information, see the following website. ...

Page 34

Data Sheet S17462EJ6V0DS μ PD720114 ...

Page 35

VOLTAGE APPLICATION WAVEFORM AT INPUT PIN: Waveform distortion due to input noise or a reflected wave may cause malfunction. If the input of the CMOS device stays in the area between VIL (MAX) and VIH (MIN) due to noise, ...

Page 36

ECOUSB is a trademark of NEC Electronics Corporation. • The information in this document is current as of December, 2009. The information is subject to change without notice. For actual design-in, refer to the latest publications of NEC Electronics data ...

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