MAX1870AETJ+ Maxim Integrated Products, MAX1870AETJ+ Datasheet - Page 29

• Manufacturer Part Number: MAX1870AETJ+
• Description: Battery Management Li+ Step Up/Step Down Battery Charger
• Manufacturer: Maxim Integrated Products

Specifications of MAX1870AETJ+

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Bypass DCIN with a 1µF to ground (Figure 1). Optional
diodes D1 and D2 protect the MAX1870A when the DC
power-source input is reversed. A signal diode for D1 is
adequate because DCIN only powers the LDO and the
internal reference. Good PC board layout is required to
achieve specified noise, efficiency, and stable perfor-
mance. The PC board layout artist must be given
explicit instructions—preferably, a pencil sketch show-
ing the placement of the power-switching components
and high-current routing. Refer to the PC board layout
in the MAX1870A evaluation kit for examples. A ground
plane is essential for optimum performance. In most
applications, the circuit is located on a multilayer
board, and full use of the four or more copper layers is
recommended. Use the top layer for high-current con-
nections (PGND, DHI, VHP, VHN, BLKP, and DLOV),
the bottom layer for quiet connections (CSSP, CSSN,
CSSS, CSIP, CSIN, REF, CCV, CCI, CCS, DCIN, LDO
and GND), and the inner layers for an uninterrupted
ground plane. Use the following step-by-step guide:
1) Place the high-power connections first, with their
• Minimize the current-sense resistor trace lengths,
• Minimize ground trace lengths in the high-current
• Minimize other trace lengths in the high-current paths.
• Use >5mm wide traces for high-current paths.
grounds adjacent:
and ensure accurate current sensing with Kelvin
connections. Use independent branches for CSSP,
CSSS, CSSN, CSIP, and CSIN.
paths.
______________________________________________________________________________________
Layout and Bypassing
Ideally, surface-mount power components are flush
against one another with their ground terminals almost
touching. These high-current grounds are then connect-
ed to each other with a wide, filled zone of top-layer cop-
per, so they do not go through vias. Other high-current
paths should also be minimized, but focus primarily on
short ground and current-sense connections to eliminate
about 90% of all PC board layout problems.
2) Place the IC and signal components. Keep the main
3) Use a single-point star ground placed directly
Figure 14 shows a partial layout of the power path and
components. Refer to the EV kit data sheet for more
information.
switching nodes (inductor connections) away from
sensitive analog components (current-sense traces
and REF capacitor). Important: the IC must be no
further than 10mm from the current-sense resis-
tors. Keep the gate-drive traces (DHI and DBST)
shorter than 20mm, and route them away from the
current-sense lines and REF. Place ceramic bypass
capacitors close to the IC. The bulk capacitors can
be placed further away. Bypass CSSP, CSSN, CSIN,
and CSIP to analog GND to reduce switching noise
and maintain input-current and charger-current accu-
racy. Place the current-sense input filter capacitors
under the part, connected directly to GND.
below the part. Connect the input ground trace,
power ground (subground plane), and normal
ground to this node.
Li+ Battery Charger
Step-Up/Step-Down
29