UPD720102GC-YEB-A Renesas Electronics America, UPD720102GC-YEB-A Datasheet - Page 8

• Manufacturer Part Number: UPD720102GC-YEB-A
• Description: IC HOST CTLR USB2.0 3-PORTS QFP
• Manufacturer: Renesas Electronics America

Specifications of UPD720102GC-YEB-A

• Controller Type: USB 2.0 Controller
• Interface: PCI
• Voltage - Supply: 3.135 V ~ 3.465 V
• Operating Temperature: -20°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 120-TQFP
• Package Type: TQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Current - Supply: -
• Lead Free Status / RoHS Status: Compliant, Lead free / RoHS Compliant

1. PIN INFORMATION
Notes 1. These signals become N-ch open drain buffers in normal operation.
8
AD (31:0)
CBE (3:0)0
PAR
FRAME0
IRDY0
TRDY0
STOP0
IDSEL
DEVSEL0
REQ0
GNT0
PERR0
SERR0
INTA0
PCLK
VBBRST0
CRUN0
PME0
VCCRST0
SMI0
XT1/SCLK
XT2
CLKSEL
HSMODE
SRCLK
SRDTA
SRMOD
TESTEN
TEST3
TEST4
Pin Name
2. These pins must be open on board.
Note 2
Note 2
Note 2
Normal (Test)
O (I/O)
O (I/O)
O (I/O)
O (I/O)
O (I/O)
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI input with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI input with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI I/O with OR input
3.3 V PCI input with OR input
3.3 V schmitt input
3.3 V PCI I/O with OR input
N-ch open drain buffer
3.3 V schmitt input
3.3 V I/O buffer
OSC block
OSC block
3.3 V Input
3.3 V Input
3.3 V I/O buffer
3.3 V I/O buffer
3.3 V Input with pull down resistor
3.3 V Input with pull down resistor
3.3 V Input with pull down resistor
3.3 V Input with pull down resistor
Buffer Type
Data Sheet S17998EJ4V0DS
Note 1
Note 1
Low
Low
Low
Low
High
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
Low
High
High
High
High
High
Active
Level
PCI “AD [31:0]” signal
PCI “C/BE [3:0]” signal
PCI “PAR” signal
PCI “FRAME#” signal
PCI “IRDY#” signal
PCI “TRDY#” signal
PCI “STOP#” signal
PCI “IDSEL” signal
PCI “DEVSEL#” signal
PCI “REQ#” signal
PCI “GNT#” signal
PCI “PERR#” signal
PCI “SERR#” signal
PCI “INTA#” signal
PCI “CLK” signal
PCI “RST#” signal
PCI “CLKRUN#” signal
PCI “PME#” signal
PCI “RST#” signal for D3
System management interrupt output
System clock input or oscillator in
Oscillator out
Input clock frequency select signal
Hyper-Speed transfer mode enable signal
Serial ROM clock out
Serial ROM data
Serial ROM input enable
Test enable pin
Test control
Test control
Function
cold
support
μ
PD720102
(1/2)