MAX3421EETJ+T Maxim Integrated Products, MAX3421EETJ+T Datasheet - Page 9
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MAX3421EETJ+T
Manufacturer Part Number
MAX3421EETJ+T
Description
IC USB PERIPH/HOST CNTRL 32TQFN
Manufacturer
Maxim Integrated Products
Datasheet
1.MAX3421EETJ.pdf
(32 pages)
Specifications of MAX3421EETJ+T
Controller Type
USB Peripheral Controller
Interface
USB/Serial
Voltage - Supply
3 V ~ 3.6 V
Current - Supply
15mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
32-TQFN Exposed Pad
For Use With
MAX3421EVKIT-1+ - EVAL KIT FOR MAX3421E
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Note 1b: In peripheral mode, the MAX3421E performs identically to the MAX3420E with the following enhancements:
Table 2. MAX3421E Register Map in Host Mode (HOST = 1) (Note 2)
Table 1. MAX3421E Register Map in Peripheral Mode (HOST = 0) (Notes 1a, 1b) (continued)
R EG
R10 —
R11 —
R12 —
R13 USBIRQ
R14 USBIEN
R15 USBCTL
R16 CPUCTL
R17 PINCTL
R18 REVISION
R19 —
R20 IOPINS1
R21 IOPINS2
R22 GPINIRQ
R23 GPINIEN
R24 GPINPOL
R25 HIRQ
R26 HIEN
R27 MODE
R28 PERADDR
R29 HCTL
R30 HXFR
R31 HRSL
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
—
RCVFIFO
SNDFIFO
—
SUDFIFO
—
RCVBC
SNDBC
—
—
NAME
1) R16 adds the PULSEWID0 and PULSEWID1 bits to control the INT pulse width in edge interrupt mode
2) R21 adds four more GPIO bits.
3) R22 and R23 add general-purpose input pins to the interrupt system. R24 controls the edge polarity.
4) R27 controls the peripheral/host mode and the SEPIRQ bit.
5) When [GPXB:GPXA] = [1:0] and the bit SEPIRQ = 1 (R27 bit 4), the GPX output replaces the BUSACT
(see Figure 12.) These bits default to the MAX3420E setting of 10.6µs.
signal with a second IRQ pin dedicated to the GPIN pin interrupts.
H X FRD N IRQ
P U LS E WID 1 P U LS E WID 0
D P P U LLD N
GP IN P OL7
H X FRD N IE
GP IN IRQ7
S N D TOG1
GP IN IE N 7
E P 3IN AK
JS TATU S
_______________________________________________________________________________________
GP IN 3
GP IN 7
H S
b 7
b 7
b 7
b 7
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
D M P U LLD N
FRAM E IRQ
GP IN P OL6
GP IN IRQ6
S N D TOG0
GP IN IE N 6
KS TATU S
V BU S IRQ
E P 2IN AK
FRAM E IE
V BU S IE
GP IN 2
GP IN 6
BC 6
BC 6
IS O
b 6
b 6
b 6
b 6
b 6
0
0
0
0
0
0
0
0
0
0
0
N OV BU S IRQ
S N D TOGRD RC V TOGRD
N OV BU S IE
GP IN P OL5
D E LAY IS O
C ON N IRQ
RC V TOG1
GP IN IRQ5
GP IN IE N 5
C H IP RE S
E P 0IN AK
C ON N IE
OU TN IN
GP IN 1
GP IN 5
USB Peripheral/Host Controller
BC 5
BC 5
b 5
b 5
b 5
b 5
b 5
0
0
0
0
0
0
0
0
0
0
0
P WRD OWN
S U S D N IRQ S N D BAV IRQ
GP IN P OL4
RC V TOG0
GP IN IRQ4
GP IN IE N 4
S U S D N IE
FD U P S P I
S E P IRQ
S E TU P
GP IN 0
GP IN 4
BC 4
BC 4
b 4
b 4
b 4
b 4
b 4
0
0
0
0
0
0
0
0
0
0
0
1
0
S OFKAE N AB
GP IN P OL3
S N D BAV IE
GP IN IRQ3
IN TLE V E L
GP IN IE N 3
GP O U T3
GP O U T7
S IG RS M
H RS LT3
BC 3
BC 3
E P 3
b 3
b 3
b 3
b 3
b 3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
with SPI Interface
BU S S AM P LE
RC V D AV IRQ
GP IN P OL2
RC V D AV IE
GP IN IRQ2
GP IN IE N 2
GP O U T2
GP O U T6
H U BP RE
H RS LT2
P OS IN T
BC 2
BC 2
E P 2
b 2
b 2
b 2
b 2
b 2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
RS M RE QIRQ
RS M RE QIE
GP IN P OL1
GP IN IRQ1
GP IN IE N 1
GP O U T1
GP O U T5
FRM RS T
H RS LT1
S P E E D
GP X B
BC 1
BC 1
E P 1
b 1
b 1
b 1
b 1
b 1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
BU S E V E N TIRQ
BU S E V E N TIE
OS C OKIRQ
GP IN P OL0
GP IN IRQ0
OS C OKIE
GP IN IE N 0
H OS T = 1
GP O U T0
GP O U T4
BU S RS T
H RS LT0
GP X A
BC 0
BC 0
E P 0
b 0
b 0
b 0
b 0
b 0
IE
0
0
0
0
0
0
0
0
0
0
0
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
RS C
a c c
RC
RC
RC
LS
LS
—
—
—
—
—
—
—
—
—
R
R
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