AT83C26-PLTUL Atmel, AT83C26-PLTUL Datasheet - Page 15

• Manufacturer Part Number: AT83C26-PLTUL
• Description: IC SMART CARD READER 1/PM 48-MLF
• Manufacturer: Atmel

Specifications of AT83C26-PLTUL

• Controller Type: Smart Card Reader Interface
• Interface: 2-Wire
• Voltage - Supply: 3 V ~ 5.5 V
• Current - Supply: 65mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 48-QFN
• For Use With: AT89STK-09 - EVAL BOARD FOR AT83C26
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

CRSTn for SCn interface (n= 3, 4, 5)
CIO, CC4, CC8 controller
CIO1, CC41, CC81 controller for SC1 interface
7511D–SCR–02/07
The CRSTn output pin is driven by the CARDRSTn bit value (see SCn_CFG2 register).
Two modes are available:
•
•
If SC2_FULL=1, the SC3 interface is not available.
The CIO1, CC41, CC81 output pins are driven respectively by CARDIO1, CARDC41, CARDC81
bits values or by I/O1, I/O2, AUX1or AUX2 signals. This selection depends of the IODIS1 bit
value (SC1_INTERFACE register) and of IOSEL[3:0] bits value (IO_SELECT register).
If IODIS1 is set, the CARDIO1 bit value is output on CIO1.The input selected by IOSEL for CIO1
is in High impedance state. CC41 and CC81 have the same behavior.
If IODIS1 is reset, data are bidirectional between the I/O1, I/O2, AUX1, AUX2 pins (see
IO_SELECT register) and CIO1, CC41, CC81 pins.
Figure 6. CRSTn Block Diagram
Figure 7. CIO1, CC41, CC81 Block Diagram
If the ARTn bit is reset, CRSTn pin is driven by CARDRSTn bit.
If the ARTn bit is set, CRSTn pin is controlled and follows the “Automatic Reset Transition”
(see Activation sequence page 25).
AUX1
AUX2
IO2
IO1
CARDRSTn bit
IODIS1 bit
HiZ
control
CARDRSTn bit
IOSEL[3:0]
Multiplex
tb delay
ARTn bit
CARDIO1 bit
CARDC41 bit
CARDC81 bit
1
0
1
0
1
1
0
0
AT83C26
CRSTn
CC81
CIO1
CC41
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