MAX1954AEUB-T Maxim Integrated Products, MAX1954AEUB-T Datasheet - Page 10

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MAX1954AEUB-T

Manufacturer Part Number
MAX1954AEUB-T
Description
Current Mode PWM Controllers
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX1954AEUB-T

Number Of Outputs
1
Duty Cycle (max)
93 %
Output Voltage
0.8 V to 4.95 V
Output Current
25000 mA
Mounting Style
SMD/SMT
Package / Case
uSOP-10
Switching Frequency
360 KHz
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Synchronous Pin
No
Topology
Boost, Buck
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Low-Cost, Current-Mode PWM Buck
Controller with Foldback Current Limit
When the output is shorted, the foldback current limit
reduces the current-limit threshold linearly to 20% of
the nominal value to reduce the power dissipation of
components and the input current. Once the voltage
across the low-side MOSFET drops below the current-
limit threshold, the high-side MOSFET is turned on at
the next clock cycle. During severe-overload and short-
circuit conditions, the frequency of the MAX1954A
appears to decrease because the on-time of the
low-side MOSFET extends beyond a clock cycle. The
current-limit threshold is preset to 135mV.
In addition to the valley current limit, the MAX1954A
also features a cycle-by-cycle peak-current clamp that
limits the voltage across the high-side MOSFET by ter-
minating its on-time. This, together with the valley fold-
back current limit, provides a very robust overload and
short-circuit protection.
Synchronous rectification reduces conduction losses in
the rectifier by replacing the normal Schottky catch
diode with a low-resistance MOSFET switch. The
MAX1954A also uses the synchronous rectifier to ensure
proper startup of the boost gate-driver circuit and to
provide the current-limit signal. The DL low-side wave-
form is always the complement of the DH high-side
drive waveform (with controlled dead time to prevent
crossconduction or shoot-through). A dead-time circuit
monitors the DL output and prevents the high-side
MOSFET from turning on until DL is fully off. For the
dead-time circuit to work properly, there must be a low-
resistance, low-inductance path from the DL driver to
the MOSFET gate. Otherwise, the sense circuitry in the
MAX1954A interprets the MOSFET gate as off although
gate charge actually remains. Use very short, wide
traces (50 mils to 100 mils wide if the MOSFET is 1in
from the device). The dead time at the other edge (DH
turning off) is also determined through gate sensing.
Gate-drive voltage for the high-side, N-channel switch
is generated by a flying-capacitor boost circuit (Figure
3). The capacitor between BST and LX is charged from
the V
low-side MOSFET is on. When the low-side MOSFET is
switched off, the stored voltage of the capacitor is
stacked above LX to provide the necessary turn-on
voltage (V
then closes an internal switch between BST and DH to
turn the high-side MOSFET on.
10
______________________________________________________________________________________
IN
supply up to V
GS
High-Side Gate-Drive Supply (BST)
Synchronous-Rectifier Driver (DL)
) for the high-side MOSFET. The controller
IN
minus the diode drop while the
If V
the supply voltage is too low for proper circuit opera-
tion, so the UVLO circuitry inhibits switching and forces
the DL and DH gate drivers low. After V
2.7V, the controller goes into the startup sequence and
resumes normal operation.
The MAX1954A begins switching when V
the UVLO threshold. However, the controller is not
enabled unless five conditions are met:
1) V
2) The internal reference exceeds 92% of its nominal
3) The internal bias circuitry powers up.
4) The thermal-overload limit is not exceeded.
5) The feedback voltage is below the regulation
If these conditions are met, the step-down controller
enables soft-start and begins switching. The soft-start cir-
cuitry gradually ramps up the output voltage until the volt-
age at FB is equal to the reference voltage. This controls
the rate of rise of the output voltage and reduces input
surge currents during startup. The soft-start period is
1024 clock cycles (1024 / f
mented through 64 equal steps. The output reaches reg-
ulation when soft-start is completed, regardless of output
capacitance and load.
The MAX1954A also has internal circuitry to prevent
discharging of a precharged output capacitor during
soft-start or in UVLO. This feature (monotonic startup)
is needed in applications where the MAX1954A output
is connected in parallel with another power-supply
output, such as redundant-power or standby-power
applications.
Figure 3. DH Boost Circuit
IN
value (V
threshold.
IN
drops below 2.7V, the MAX1954A assumes that
exceeds the 2.7V UVLO threshold.
REF
> 1V).
Undervoltage Lockout (UVLO)
MAX1954A
IN
BST
S
DH
LX
DL
). The output voltage is incre-
N
N
IN
IN
rises above
rises above
Startup

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