DP83934CVUL-20 National Semiconductor, DP83934CVUL-20 Datasheet - Page 12
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DP83934CVUL-20
Manufacturer Part Number
DP83934CVUL-20
Description
IC CTRLR ORIENT NETWORK 160PQFP
Manufacturer
National Semiconductor
Datasheet
1.DP83934AVQB.pdf
(104 pages)
Specifications of DP83934CVUL-20
Controller Type
Network Interface Controller (NIC)
Interface
Twisted Pair
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
140mA
Operating Temperature
0°C ~ 70°C
Mounting Type
Surface Mount
Package / Case
160-MQFP, 160-PQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DP83934CVUL-20
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DP83934CVUL-20
Manufacturer:
Texas Instruments
Quantity:
10 000
3 0 Functional Description
The SONIC-T (Figure 3-1) consists of a twisted pair inter-
face (TPI) module an encoder decoder (ENDEC) unit a
media access control (MAC) unit separate receive and
transmit FIFOs a system buffer management engine and a
user programmable system bus interface unit on a single
chip SONIC-T is highly pipelined providing maximum sys-
tem level performance This section provides a functional
overview of the SONIC-T
3 1 TWISTED PAIR INTERFACE MODULE
The TPI consists of five main logic functions
a the Smart Squelch which determines when valid data is
b the Collision Detector which checks for simultaneous
c the Link Detector Generator which checks the integrity
present on the differential receive inputs (RXI
transmission and reception of data on the differential
transmit output (TXO
(RXI
of the cable connecting the two twisted pair modules
g
) pins
g
) and differential receive input
FIGURE 3-2 Twisted Pair Squelch Waveform (10BASE-T Mode)
FIGURE 3-1 SONIC-T Block Diagram
g
)
12
3-2) uses levels that meet the 10BASE-T specification The
d the Jabber which disables the transmitter if it attempts to
e the Transmitter which utilizes a Transmit Driver and a
Smart Squelch The SONIC-T Controller implements an in-
telligent receive squelch on the RXI
ensure that impulse noise on the receive inputs will not be
mistaken for a valid signal
The squelch circuitry employs a combination of amplitude
and timing mesurements to determine the validity of data on
the twisted pair inputs There are two voltage level options
for the smart squelch One mode 10BASE-T mode (Figure
second mode reduced squelch mode uses a lower squelch
threshold level and can be used in longer cable applica-
tions where smaller signal levels may be applied The
squelch level mode can be selected using the LOWSQL
input pin (see Section 2 0)
transmit a longer than legal packet and
Pre-emphasis to transmit Manchester encoded data to
the twisted pair network via summing resistors and a
transformer filter
g
TL F 11719 – 5
differential inputs to
TL F 11719 – 4