MC33889DW Freescale Semiconductor, MC33889DW Datasheet - Page 20
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MC33889DW
Manufacturer Part Number
MC33889DW
Description
IC SYSTEM BASE W/CAN 28-SOIC
Manufacturer
Freescale Semiconductor
Specifications of MC33889DW
Controller Type
System Basis Chip
Interface
CAN
Voltage - Supply
5.5 V ~ 18 V
Current - Supply
45mA
Operating Temperature
-40°C ~ 125°C
Mounting Type
Surface Mount
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC33889DW
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
20
33889
ELECTRICAL CHARACTERISTICS
DYNAMIC ELECTRICAL CHARACTERISTICS
Table 5. Dynamic Electrical Characteristics (continued)
noted reflect the approximate parameter means at
Failure 3 Detection Time (Normal Mode)
Failure 3 Recovery Time (Normal Mode)
Failure 6 Detection Time (Normal Mode)
Failure 6 Recovery Time (Normal Mode)
Failure 4, 7 Detection Time (Normal Mode)
Failure 4, 7 Recovery Time (Normal Mode)
Failure 3a, 8 Detection Time (Normal Mode)
Failure 3a, 8 Recovery Time (Normal Mode)
Failure 4, 7 Detection Time, (Term V
Failure 4, 7 Recovery Time (Term V
Failure 3 Detection Time (Term V
Failure 3 Recovery Time (Term V
Failure 3a, 8Detection Time (Term V
Failure 3a, 8 Recovery Time (Term V
Notes
Loop time Tx to Rx, no bus failure, MC33889D only ((27),
Figure
Loop time Tx to Rx, with bus failure, MC33889D only ((27),
Figure
Loop time Tx to Rx, with bus failure and +-1.5V gnd shift, 5
nodes network, MC33889D,((28),
series 11)
Min. Dominant Time For Wake-up On CANL or CANH
(Term Vbat; V
27.
28.
V
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
Tx high to low transition (dominant edge)
Tx low to high transition (recessive edge)
MC33889B
MC33889D
SUP
AC characteristic according to ISO11898-3, tested per figure 5 and 6. Guaranteed by design, room temperature only.
AC characteristic according to ISO11898-3, tested per figure 7. Max reported is the typical measurement under the worst condition
(gnd shift, dominant/recessive edge, at source or destination node. ref to ISO test specification). Guaranteed by design, room
temperature only.
5) (ISO ICT test series 10)
6) (ISO ICT test series 10)
From 5.5 V to 18 V, V2INT from 4.75 to 5.25 V and T
SUP
= 12V) Guaranteed by design.
Conditions
BAT
BAT
BAT
Figure
BAT
; V
; V
BAT
BAT
; V
SUP
SUP
; V
; V
; V
SUP
SUP
SUP
SUP
7, ISO ICT tests
= 12 V)
= 12 V)
= 12 V)
= 12 V)
= 12 V)
= 12 V)
T
A
=
25°C under nominal conditions unless otherwise noted.
t
LOOPRD/DR-F+GS
t
J
LOOPRD-F
t
Symbol
LOOPRD
t
tT
from -40°C to 150°C unless otherwise noted. Typical values
t
t
t
t
WAKE
t
t
t
t
DR47
t
DR47
DR47
t
t
t
t
DF47
DR3
DR6
DR3
DR3
DR8
DR8
DF3
DF6
DF8
DR8
0.75
0.75
0.75
Min
150
8.0
0.8
10
50
10
Analog Integrated Circuit Device Data
1.15
1.45
1.92
3.84
1.92
Typ
160
200
200
1.5
1.7
1.5
1.2
2.3
1.2
30
16
30
30
-
-
Freescale Semiconductor
1000
Max
500
1.5
1.5
1.9
1.9
3.6
4.0
4.0
4.0
8.0
30
80
60
Unit
ms
ms
ms
ms
ms
ms
ms
ms
ms
µs
µs
µs
µs
µs
µs
µs
µs
µs