DS90C363MTD National Semiconductor, DS90C363MTD Datasheet - Page 12

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DS90C363MTD

Manufacturer Part Number
DS90C363MTD
Description
IC TX LVDS FPD 18BIT 48-TSSOP
Manufacturer
National Semiconductor
Type
LVDS Data Transmissionr
Datasheet

Specifications of DS90C363MTD

Number Of Drivers/receivers
3/21
Protocol
RS644
Voltage - Supply
3 V ~ 3.6 V
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
*DS90C363MTD

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1288611
C—Setup and Hold Time (Internal data sampling window) defined by Rspos (receiver input strobe position) min and max
Tppos—Transmitter output pulse position (min and max)
RSKM = Cable Skew (type, length) + Source Clock Jitter (cycle to cycle)
(Note Cycle-to-cycle jitter is less than 250 ps at 65 MHz.
) + ISI (Inter-symbol interference)
(Note ISI is dependent on interconnect length; may be zero.
)
Cable Skew—typically 10 ps–40 ps per foot, media dependent
Note 10: Cycle-to-cycle jitter is less than 250 ps at 65 MHz.
Note 11: ISI is dependent on interconnect length; may be zero.
FIGURE 19. Receiver LVDS Input Skew Margin
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