PIC16C74B-20I/L Microchip Technology Inc., PIC16C74B-20I/L Datasheet - Page 82
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PIC16C74B-20I/L
Manufacturer Part Number
PIC16C74B-20I/L
Description
44 PIN, 7 KB OTP, 192 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C74B-20IL.pdf
(184 pages)
Specifications of PIC16C74B-20I/L
A/d Inputs
8-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
44-pin PLCC
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
4 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16C74B-20I/L
Manufacturer:
Microchip Technology
Quantity:
10 000
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PIC16C63A/65B/73B/74B
12.1
For the A/D converter to meet its specified accuracy,
the charge holding capacitor (C
to fully charge to the input channel voltage level. The
analog input model is shown in Figure 12-2. The
source impedance (R
switch (R
required to charge the capacitor C
switch (R
(V
offset voltage at the analog input (due to pin leakage
current).
FIGURE 12-2:
EQUATION 12-1:
DS30605C-page 82
T
DD
ACQ
), Figure 12-2. The source impedance affects the
A/D Acquisition Requirements
=
=
SS
SS
) impedance varies over the device voltage
) impedance directly affect the time
Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
T
T
T
T
AMP
AMP
C
COFF
= - (51.2 pF)(1 k + R
Legend:
+ T
= 5 S
= (Temp -25 C)(0.05 S/ C)
VA
C
ANALOG INPUT MODEL
ACQUISITION TIME
S
+ T
) and the internal sampling
Rs
C
V
I leakage
R
SS
C
T
COFF
PIN
IC
HOLD
ANx
C
5 pF
HOLD
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
HOLD
various junctions
) must be allowed
SS
. The sampling
+ R
S
) In(1/511)
V
DD
V
V
T
T
= 0.6 V
= 0.6 V
I leakage
± 500 nA
The maximum recommended impedance for ana-
log sources is 10 k . After the analog input channel is
selected (changed), the acquisition time (T
pass before the conversion can be started.
To
Equation 12-1 may be used. This equation assumes
that 1/2 LSb error is used (512 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.
For more information, see the PICmicro™ Mid-Range
MCU Family Reference Manual (DS33023). In general,
however, given a maximum source impedance of
10 k
will be no more than 16 sec.
R
IC
£ 1k
calculate
and a worst case temperature of 100°C, T
V
SS R
DD
Sampling
Switch
6V
5V
4V
3V
2V
SS
the
Sampling Switch
5 6 7 8 9 10 11
V
minimum
SS
C
= DAC capacitance
= 51.2 pF
(k )
HOLD
2000 Microchip Technology Inc.
acquisition
ACQ
) must
time,
ACQ
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