PIC16F690-E/P Microchip Technology Inc., PIC16F690-E/P Datasheet - Page 72

• Manufacturer Part Number: PIC16F690-E/P
• Description: 20 PIN, 7 KB FLASH, 256 RAM, 18 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F690-E/P

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 7 MIPS
• Eeprom Memory: 256 Bytes
• Input Output: 18
• Interface: USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 20-pin PDIP
• Programmable Memory: 7K Bytes
• Ram Size: 256 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F631/677/685/687/689/690
REGISTER 4-8:
REGISTER 4-9:
REGISTER 4-10:
DS41262C-page 70
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-4
bit 3-0
Note 1: Global RABPU bit of the OPTION register must be enabled for individual pull-ups to be enabled.
TRISB7
WPUB7
IOCB7
R/W-1
R/W-1
R/W-0
2: The weak pull-up device is automatically disabled if the pin is in Output mode (TRISB<7:4> = 0).
TRISB<7:4>: PORTB Tri-State Control bit
1 = PORTB pin configured as an input (tri-stated)
0 = PORTB pin configured as an output
Unimplemented: Read as ‘0’
WPUB<7:4>: Weak Pull-up Register bit
1 = Pull-up enabled
0 = Pull-up disabled
Unimplemented: Read as ‘0’
IOCB<7:4>: Interrupt-on-Change PORTB Control bit
1 = Interrupt-on-change enabled
0 = Interrupt-on-change disabled
Unimplemented: Read as ‘0’
WPUB6
TRISB6
IOCB6
R/W-1
R/W-1
R/W-0
TRISB: PORTB TRI-STATE REGISTER
WPUB: WEAK PULL-UP PORTB REGISTER
IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
W = Writable bit
‘1’ = Bit is set
TRISB5
WPUB5
IOCB5
R/W-1
R/W-1
R/W-0
TRISB4
WPUB4
IOCB4
R/W-1
R/W-1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
‘0’ = Bit is cleared
‘0’ = Bit is cleared
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
© 2006 Microchip Technology Inc.
x = Bit is unknown
x = Bit is unknown
x = Bit is unknown
U-0
U-0
U-0
—
—
—
U-0
U-0
U-0
—
—
—
bit 0
bit 0
bit 0