PIC16C71-04/P Microchip Technology Inc., PIC16C71-04/P Datasheet - Page 47
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PIC16C71-04/P
Manufacturer Part Number
PIC16C71-04/P
Description
18 PIN, 1.75 KB OTP, 36 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C71-04P.pdf
(177 pages)
Specifications of PIC16C71-04/P
A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
OTP
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
1.75K Bytes
Ram Size
36 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
3-6 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
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Price
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8.0
What sets a microcontroller apart from other proces-
sors are special circuits to deal with the needs of real-
time applications. The PIC16CXX family has a host of
such features intended to maximize system reliability,
minimize cost through elimination of external compo-
nents, provide power saving operating modes and offer
code protection. These are:
• Oscillator selection
• Reset
• Interrupts
• Watchdog Timer (WDT)
• SLEEP
• Code protection
• ID locations
• In-circuit serial programming
The PIC16CXX has a Watchdog Timer which can be
shut off only through configuration bits. It runs off its
own RC oscillator for added reliability. There are two
timers that offer necessary delays on power-up. One is
the Oscillator Start-up Timer (OST), intended to keep
the chip in reset until the crystal oscillator is stable. The
other is the Power-up Timer (PWRT), which provides a
FIGURE 8-1:
Applicable Devices
1997 Microchip Technology Inc.
- Power-on Reset (POR)
- Power-up Timer (PWRT)
- Oscillator Start-up Timer (OST)
- Brown-out Reset (BOR)
- Parity Error Reset (PER) (PIC16C715)
bit13
bit 13-5: Unimplemented: Read as '1'
bit 4:
bit 3:
bit 2:
bit 1-0:
(PIC16C710/711/715)
—
SPECIAL FEATURES OF THE
CPU
—
CP0: Code protection bit
1 = Code protection off
0 = All memory is code protected, but 00h - 3Fh is writable
PWRTE: Power-up Timer Enable bit
1 = Power-up Timer enabled
0 = Power-up Timer disabled
WDTE: Watchdog Timer Enable bit
1 = WDT enabled
0 = WDT disabled
FOSC1:FOSC0: Oscillator Selection bits
11 = RC oscillator
10 = HS oscillator
01 = XT oscillator
00 = LP oscillator
—
CONFIGURATION WORD FOR PIC16C71
—
710 71 711 715
—
—
—
—
—
CP0
fixed delay of 72 ms (nominal) on power-up only,
designed to keep the part in reset while the power sup-
ply stabilizes. With these two timers on-chip, most
applications need no external reset circuitry.
SLEEP mode is designed to offer a very low current
power-down mode. The user can wake-up from SLEEP
through external reset, Watchdog Timer Wake-up, or
through an interrupt. Several oscillator options are also
made available to allow the part to fit the application.
The RC oscillator option saves system cost while the
LP crystal option saves power. A set of configuration
bits are used to select various options.
8.1
The configuration bits can be programmed (read as '0')
or left unprogrammed (read as '1') to select various
device configurations. These bits are mapped in pro-
gram memory location 2007h.
The user will note that address 2007h is beyond the
user program memory space. In fact, it belongs to the
special test/configuration memory space (2000h -
3FFFh), which can be accessed only during program-
ming.
PWRTE WDTE FOSC1 FOSC0
Configuration Bits
PIC16C71X
bit0
Register:
Address
DS30272A-page 47
CONFIG
2007h
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