PIC16F54-I/P Microchip Technology Inc., PIC16F54-I/P Datasheet - Page 19
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PIC16F54-I/P
Manufacturer Part Number
PIC16F54-I/P
Description
18 PIN, 768 B FLASH, 25 RAM, 12 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16F54-IP.pdf
(90 pages)
Specifications of PIC16F54-I/P
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Frequency
20 MHz
Input Output
12
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
750 Bytes
Ram Size
25 Bytes
Speed
20 MHz
Timers
1-8-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
PIC16F54-I/P
Manufacturer:
MARVELL
Quantity:
429
3.3
This register contains the arithmetic status of the ALU,
the Reset status and the page preselect bits for
program memories larger than 512 words.
The Status register can be the destination for any
instruction, as with any other register. If the Status
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
Status register as destination may be different than
intended.
REGISTER 3-1:
2004 Microchip Technology Inc.
Status Register
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
STATUS REGISTER (ADDRESS: 03h)
PA2: Reserved, do not use
Use of the PA2 bit as a general purpose read/write bit is not recommended, since this may affect upward
compatibility with future products.
PA<1:0>: Program Page Preselect bits (PIC16F57/PIC16F59)
00 = Page 0 (000h-1FFh)
01 = Page 1 (200h-3FFh)
10 = Page 2 (400h-5FFh)
11 = Page 3 (600h-7FFh)
Each page is 512 words. Using the PA<1:0> bits as general purpose read/write bits in devices which do
not use them for program page preselect is not recommended. This may affect upward compatibility with
future products.
TO: Time-Out bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-Down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit Carry/Borrow bit (for ADDWF and SUBWF instructions)
ADDWF
1 = A carry to the 4th low order bit of the result occurred
0 = A carry from the 4th low order bit of the result did not occur
SUBWF
1 = A borrow to the 4th low order bit of the result did not occur
0 = A borrow from the 4th low order bit of the result occurred
C: Carry/Borrow bit (for ADDWF, SUBWF and RRF, RLF instructions)
ADDWF
1 = A carry occurred
0 = A carry did not occur
Legend:
R = Readable bit
- n = Value at POR
bit 7
R/W-0
PA2
R/W-0
PA1
R/W-0
PA0
SUBWF
1 = A borrow did not occur
0 = A borrow occurred
W = Writable bit
‘1’ = Bit is set
R-1
TO
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the Status register as
000u u1uu (where u = unchanged).
Therefore, it is recommended that only BCF, BSF,
MOVWF and SWAPF instructions be used to alter the
Status register because these instructions do not affect
the Z, DC or C bits from the Status register. For other
instructions
Section 9.0 “Instruction Set Summary”.
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PD
which
RRF or RLF
Loaded with LSb or MSb, respectively
do
R/W-x
Z
affect
PIC16F5X
x = Bit is unknown
R/W-x
Status
DC
DS41213C-page 17
bits,
R/W-x
C
bit 0
see