PIC10F206T-I/OT Microchip Technology Inc., PIC10F206T-I/OT Datasheet - Page 55

• Manufacturer Part Number: PIC10F206T-I/OT
• Description: MCU, 6 Pin, 513 Flash, 24 RAM, 4 I/O, SOT-23-6
• Manufacturer: Microchip Technology Inc.

Specifications of PIC10F206T-I/OT

• Comparators: 1
• Cpu Speed: 1 MIPS
• Eeprom Memory: 0 Bytes
• Frequency: 4 MHz
• Input Output: 4
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 6-pin SOT23
• Programmable Memory: 0.75K Bytes
• Ram Size: 24 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

ADDWF
Syntax:
Operands:
Operation:
Status Affected: C, DC, Z
Description:
ANDLW
Description:
ANDWF
Syntax:
Operands:
Operation:
Status Affected: Z
Description:
© 2007 Microchip Technology Inc.
Status Affected: Z
Operands:
Operation:
Syntax:
[ label ] ADDWF
0 ≤ f ≤ 31
d ∈ [0,1]
(W) + (f) → (dest)
Add the contents of the W register
and register ‘f’. If ‘d’ is ‘0’, the result
is stored in the W register. If ‘d’ is
‘1’, the result is stored back in
register ‘f’.
Add W and f
AND W with f
[ label ] ANDWF
0 ≤ f ≤ 31
d ∈ [0,1]
(W) .AND. (f) → (dest)
The contents of the W register are
AND’ed with register ‘f’. If ‘d’ is ‘0’,
the result is stored in the W register.
If ‘d’ is ‘1’, the result is stored back
in register ‘f’.
(W).AND. (k) → (W)
AND literal with W
[ label ] ANDLW
0 ≤ k ≤ 255
The contents of the W register are
AND’ed with the eight-bit literal ‘k’.
The result is placed in the W
register.
f,d
f,d
k
PIC10F200/202/204/206
BCF
Syntax:
Operands:
Operation:
Status Affected: None
Description:
BSF
Syntax:
Operands:
Operation:
Status Affected: None
BTFSC
Syntax:
Operands:
Operation:
Status Affected: None
Description:
Description: Bit ‘b’ in register ‘f’ is set.
Bit Clear f
[ label ] BCF
0 ≤ f ≤ 31
0 ≤ b ≤ 7
0 → (f<b>)
Bit ‘b’ in register ‘f’ is cleared.
Bit Set f
[ label ] BSF
0 ≤ f ≤ 31
0 ≤ b ≤ 7
1 → (f<b>)
Bit Test f, Skip if Clear
[ label ] BTFSC f,b
0 ≤ f ≤ 31
0 ≤ b ≤ 7
skip if (f<b>) = 0
If bit ‘b’ in register ‘f’ is ‘0’, then the
next instruction is skipped.
If bit ‘b’ is ‘0’, then the next instruc-
tion fetched during the current
instruction execution is discarded,
and a NOP is executed instead,
making this a two-cycle instruction.
f,b
f,b
DS41239D-page 53