DSPIC30F6011A-30I/PT Microchip Technology Inc., DSPIC30F6011A-30I/PT Datasheet - Page 152
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DSPIC30F6011A-30I/PT
Manufacturer Part Number
DSPIC30F6011A-30I/PT
Description
DSP, 16-Bit, 132 KB Flash, 6KB RAM, 52 I/O, TQFP-64
Manufacturer
Microchip Technology Inc.
Type
DSPr
Datasheet
1.DSPIC30F6012A-30IPT.pdf
(238 pages)
Specifications of DSPIC30F6011A-30I/PT
A/d Inputs
16-Channels, 12-Bit
Cpu Speed
30 MIPS
Eeprom Memory
2K Bytes
Input Output
52
Interface
CAN, I2C, SPI, UART/USART
Ios
52
Memory Type
Flash
Number Of Bits
16
Package Type
64-pin TQFP
Programmable Memory
132K Bytes
Ram Size
6K Bytes
Timers
5-16-bit, 2-32-bit
Voltage, Range
2.5-5.5
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DSPIC30F6011A-30I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
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- Download datasheet (4Mb)
dsPIC30F6011A/6012A/6013A/6014A
REGISTER 20-1:
DS70143C-page 150
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7-6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
R/W-0
U-0
—
POST<1:0>
Unimplemented: Read as ‘0’
COSC<2:0>: Current Oscillator Group Selection bits (read-only)
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits
011 = External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by FPR<4:0>
010 = LPRC internal low-power RC
001 = FRC internal fast RC
000 = LP crystal oscillator; SOSCI/SOSCO pins
Set to FOS<2:0> values on POR or BOR.
Loaded with NOSC<2:0> at the completion of a successful clock switch.
Set to FRC value when FSCM detects a failure and switches clock to FRC.
Unimplemented: Read as ‘0’
NOSC<2:0>: New Oscillator Group Selection bits
111 = PLL Oscillator; PLL source selected by FPR<4:0> bits
011 = External Oscillator; OSC1/OSC2 pins; External Oscillator configuration selected by FPR<4:0>
010 = LPRC internal low-power RC
001 = FRC internal fast RC
000 = LP crystal oscillator; SOSCI/SOSCO pins
Set to FOS<2:0> values on POR or BOR.
POST<1:0>: Oscillator Postscaler Selection bits
11 = Oscillator postscaler divides clock by 64
10 = Oscillator postscaler divides clock by 16
01 = Oscillator postscaler divides clock by 4
00 = Oscillator postscaler does not alter clock
LOCK: PLL Lock status bit (Read Only)
1 = Indicates that PLL is in lock
0 = Indicates that PLL is out of lock (or disabled)
Unimplemented: Read as ‘0’
CF: Clock Fail Detect bit (read/clearable by application)
1 = FSCM has detected clock failure
0 = FSCM has NOT detected clock failure
Unimplemented: Read as ‘0’
LPOSCEN: 32 KHz Secondary (LP) Oscillator Enable
1 = Secondary Oscillator is enabled
0 = Secondary Oscillator is disabled
OSWEN: Oscillator Switch Enable bit
1 = Request Oscillator switch to selection specified by NOSC<2:0> bits
0 = Oscillator switch is complete
R/W-0
R-y
bits
bits
OSCCON: OSCILLATOR CONTROL REGISTER
COSC<2:0>
y = Values dependent on F
W = Writable bit
‘1’ = Bit is set
LOCK
R-0
R-y
R-y
U-0
Preliminary
—
OSC
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U-0
CF
—
R/W-y
U-0
—
© 2006 Microchip Technology Inc.
NOSC<2:0>
x = Bit is unknown
LPOSCEN
R/W-0
R/W-y
OSWEN
R/W-y
R/W-0
bit 8
bit 0
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