PIC16C74B-20/P Microchip Technology Inc., PIC16C74B-20/P Datasheet - Page 35
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PIC16C74B-20/P
Manufacturer Part Number
PIC16C74B-20/P
Description
40 PIN, 7 KB OTP, 192 RAM, 33 I/O
Manufacturer
Microchip Technology Inc.
Datasheet
1.PIC16C74B-20P.pdf
(184 pages)
Specifications of PIC16C74B-20/P
A/d Inputs
8-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
33
Interface
I2C/SPI/USART
Memory Type
OTP
Number Of Bits
8
Package Type
40-pin PDIP
Programmable Memory
7K Bytes
Ram Size
192 Bytes
Speed
4 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2.5-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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5.5
PORTE has three pins: RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7, which are individually configured as
inputs or outputs. These pins have Schmitt Trigger
input buffers.
I/O PORTE becomes control inputs for the micropro-
cessor port when bit PSPMODE (TRISE<4>) is set. In
this mode, the user must make sure that the
TRISE<2:0> bits are set (pins are configured as digital
inputs) and that register ADCON1 is configured for dig-
ital I/O. In this mode, the input buffers are TTL.
Register 5-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins may be multiplexed with analog inputs
(PIC16C74B only). The operation of these pins is
selected by control bits in the ADCON1 register. When
selected as an analog input, these pins will read as ’0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
TABLE 5-9:
Name
RE0/RD/AN5
RE1/WR/AN6
RE2/CS/AN7
Legend:
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
Note:
2000 Microchip Technology Inc.
Note 1: The PIC16C63A and PIC16C73B do not
PORTE and TRISE Register
2: The PIC16C63A/65B does not provide an
ST = Schmitt Trigger input, TTL = TTL input
On a Power-on Reset, these pins are con-
figured as analog inputs and read as ‘0’s.
provide PORTE. The PORTE and TRISE
registers are not implemented.
A/D module. A/D functions are not imple-
mented.
PORTE FUNCTIONS
Bit#
bit0
bit1
bit2
Buffer Type
ST/TTL
ST/TTL
ST/TTL
(1)
(1)
(1)
Function
Input/output port pin or read control input in Parallel Slave Port mode or analog
input:
Input/output port pin or write control input in Parallel Slave Port mode or analog
input:
Input/output port pin or chip select control input in Parallel Slave Port mode or
analog input:
RD
1 = Idle
0 = Read operation. Contents of PORTD register is output to PORTD
CS
1 = Device is not selected
0 = Device is selected
WR
1 = Idle
0 = Write operation. Value of PORTD I/O pins is latched into PORTD
PIC16C63A/65B/73B/74B
I/O pins (if chip selected).
register (if chip selected).
FIGURE 5-7:
Note 1: I/O pins have protection diodes to V
WR
TRIS
Data
Bus
WR
Port
RD Port
TRIS Latch
Data Latch
D
D
CK
CK
RD TRIS
Q
Q
PORTE BLOCK DIAGRAM
Q
EN
Schmitt
Trigger
Input
Buffer
EN
D
DS30605C-page 35
DD
I/O pin
and V
(1)
SS
.