PIC24HJ32GP202-I/SO Microchip Technology Inc., PIC24HJ32GP202-I/SO Datasheet - Page 177

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PIC24HJ32GP202-I/SO

Manufacturer Part Number
PIC24HJ32GP202-I/SO
Description
16-BIT MCU, 28LD, 32KB FLASH, 40 MIPS, NANOWATT
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC24HJ32GP202-I/SO

A/d Inputs
10 Channel, 12-Bit
Cpu Speed
40 MIPS
Eeprom Memory
0 Bytes
Input Output
21
Interface
I2C/SPI/UART
Memory Type
Flash
Number Of Bits
16
Package Type
28-pin SOIC
Programmable Memory
32K Bytes
Ram Size
2K Bytes
Timers
3-16-bit, 1-32-bit
Voltage, Range
3-3.6 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device
TABLE 18-2:
© 2007 Microchip Technology Inc.
WDTPOST<3:0>
POSCMD<1:0>
FPWRT<2:0>
FCKSM<1:0>
OSCIOFNC
IOL1WAY
WDTPRE
FWDTEN
Bit Field
WINDIS
ALTI2C
PIC24HJ32GP202/204 and PIC24HJ16GP304
PIC24HJ32GP202/204 AND PIC24HJ16GP304 CONFIGURATION BITS DESCRIPTION
(CONTINUED)
Register
FOSC
FOSC
FWDT
FWDT
FWDT
FWDT
FPOR
FPOR
FOSC
FOSC
Clock Switching Mode bits
1x = Clock switching is disabled, Fail-Safe Clock Monitor is disabled
01 = Clock switching is enabled, Fail-Safe Clock Monitor is disabled
00 = Clock switching is enabled, Fail-Safe Clock Monitor is enabled
Peripheral Pin Select Configuration
1 = Allow only one re-configuration
0 = Allow multiple re-configurations
OSC2 Pin Function bit (except in XT and HS modes)
1 = OSC2 is clock output
0 = OSC2 is general purpose digital I/O pin
Primary Oscillator Mode Select bits
11 = Primary oscillator disabled
10 = HS Crystal Oscillator mode
01 = XT Crystal Oscillator mode
00 = EC (External Clock) mode
Watchdog Timer Enable bit
1 = Watchdog Timer always enabled (LPRC oscillator cannot be disabled.
0 = Watchdog Timer enabled/disabled by user software (LPRC can be
Watchdog Timer Window Enable bit
1 = Watchdog Timer in Non-Window mode
0 = Watchdog Timer in Window mode
Watchdog Timer Prescaler bit
1 = 1:128
0 = 1:32
Watchdog Timer Postscaler bits
1111 = 1:32,768
1110 = 1:16,384
0001 = 1:2
0000 = 1:1
Alternate I
1 = I
0 = I
Power-on Reset Timer Value Select bits
111 = PWRT = 128 ms
110 = PWRT = 64 ms
101 = PWRT = 32 ms
100 = PWRT = 16 ms
011 = PWRT = 8 ms
010 = PWRT = 4 ms
001 = PWRT = 2 ms
000 = PWRT = Disabled
.
.
.
Clearing the SWDTEN bit in the RCON register will have no effect.)
disabled by clearing the SWDTEN bit in the RCON register)
2
2
C mapped to SDA1/SCL1 pins
C mapped to ASDA1/ASCL1 pins
Preliminary
2
C pins
Description
DS70289A-page 175

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