74AHCT574PW Philips Semiconductors, 74AHCT574PW Datasheet

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74AHCT574PW

Manufacturer Part Number
74AHCT574PW
Description
OCTAL D-TYPE FLIP FLOP
Manufacturer
Philips Semiconductors
Datasheet

Specifications of 74AHCT574PW

Circuit Type
High Speed, Low-Power Schottky, Silicon Gate
Current, Supply
80 μA
Function Type
D-Type
Logic Function
Flip-Flop
Logic Type
CMOS/TTL
Number Of Circuits
Octal
Package Type
TSSOP-20
Special Features
Non-Inverting, Schmitt-Trigger, Tri-State
Temperature, Operating, Range
-40 to +125 °C
Voltage, Supply
5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AHCT574PW
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Part Number:
74AHCT574PW,118
Manufacturer:
NXP Semiconductors
Quantity:
3 950
1. General description
2. Features
The 74AHC574; 74AHCT574 are high-speed Si-gate CMOS devices and are pin
compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with
JEDEC standard no. 7A.
The 74AHC574; 74AHCT574 are octal D-type flip-flops featuring separate D-type inputs
for each flip-flop and 3-state outputs for bus oriented applications. A clock (CP) and an
output enable (OE) input are common to all flip-flops.
The 8 flip-flops will store the state of their individual D-inputs that meet the set-up and hold
times requirements on the LOW-to-HIGH CP transition.
When OE is LOW the contents of the 8 flip-flops are available at the outputs. When OE is
HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does
not affect the state of the flip-flops.
The 74AHC574; 74AHCT574 is functionally identical to the 74AHC564; 74AHCT564, but
has non-inverting outputs. The 74AHC574; 74AHCT574 is functionally identical to
the 74AHC374; 74AHCT374, but has a different pinning.
I
I
I
I
I
I
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74AHC574; 74AHCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
Balanced propagation delays
All inputs have a Schmitt-trigger action
3-state non-inverting outputs for bus orientated applications
8-bit positive, edge-triggered register
Independent register and 3-state buffer operation
Common 3-state output enable input
For 74AHC574 only: operates with CMOS input levels
For 74AHCT574 only: operates with TTL input levels
ESD protection:
Multiple package options
Specified from 40 C to +85 C and from 40 C to +125 C
N
N
N
HBM JESD22-A114E exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101C exceeds 1000 V
Product data sheet

Related parts for 74AHCT574PW

74AHCT574PW Summary of contents

Page 1

Octal D-type flip-flop; positive edge-trigger; 3-state 1. General description The 74AHC574; 74AHCT574 are high-speed Si-gate CMOS devices and are pin compatible with Low Power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range 74AHC574D +125 C 74AHCT574D 74AHC574PW +125 C 74AHCT574PW 74AHC574BQ +125 C 74AHCT574BQ 4. Functional diagram Fig 1. Functional diagram FF1 Fig 2. Logic diagram 74AHC_AHCT574_2 Product data sheet Octal D-type flip-flop; positive edge-trigger; 3-state ...

Page 3

NXP Semiconductors 6. Functional description [1] Table 3. Function table Operating mode Load and read register Load register and disable output [ HIGH voltage level HIGH voltage level one setup time prior to the HIGH-to-LOW CP ...

Page 4

NXP Semiconductors 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter V supply voltage CC V input voltage I V output voltage O T ambient temperature amb t/ V ...

Page 5

NXP Semiconductors Table 6. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions C input I capacitance C output O capacitance For type 74AHCT574 V HIGH-level ...

Page 6

NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure Symbol Parameter Conditions t set-up time Dn to CP; see 3 3 ...

Page 7

NXP Semiconductors Table 7. Dynamic characteristics GND = 0 V. For test circuit see Figure Symbol Parameter Conditions t hold time Dn to CP; see 4 5 ...

Page 8

NXP Semiconductors TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm ...

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