24LC512-E/SM Microchip Technology Inc., 24LC512-E/SM Datasheet - Page 12
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24LC512-E/SM
Manufacturer Part Number
24LC512-E/SM
Description
512K, 64K X 8, 2.5V SER EE, EXT, SOIC-8
Manufacturer
Microchip Technology Inc.
Datasheet
1.24LC512-ESM.pdf
(28 pages)
Specifications of 24LC512-E/SM
Lead Free Status / Rohs Status
RoHS Compliant part
Electrostatic Device
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24AA512/24LC512/24FC512
7.0
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally timed write cycle. ACK polling
can be initiated immediately. This involves the master
sending a Start condition, followed by the control byte
for a Write command (R/W = 0). If the device is still
busy with the write cycle, then no ACK will be returned.
If no ACK is returned, then the Start bit and control byte
must be re-sent. If the cycle is complete, then the
device will return the ACK and the master can then
proceed with the next Read or Write command. See
Figure 7-1 for flow diagram.
DS21754J-page 12
ACKNOWLEDGE POLLING
FIGURE 7-1:
Send Control Byte
Initiate Write Cycle
Write Command
with R/W = 0
Acknowledge
Condition to
Send Stop
Send Start
Did Device
(ACK = 0)?
Operation
Send
Next
ACKNOWLEDGE POLLING
FLOW
© 2008 Microchip Technology Inc.
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