74HC4024D Philips Semiconductors, 74HC4024D Datasheet

no-image

74HC4024D

Manufacturer Part Number
74HC4024D
Description
7-STAGE BINARY RIPPLE COUNTER
Manufacturer
Philips Semiconductors
Datasheet

Specifications of 74HC4024D

Circuit Type
High Speed, Silicon Gate
Current, Supply
160 μA
Function Type
7-Stages
Logic Function
Counter
Logic Type
CMOS
Package Type
SO-14
Special Features
Binary, Parallel, Ripple, Schmitt-Trigger
Temperature, Operating, Range
-40 to +125 °C
Voltage, Supply
5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74HC4024D
Manufacturer:
TI
Quantity:
16 592
Part Number:
74HC4024D
Manufacturer:
ST
0
Part Number:
74HC4024D
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74HC4024D,653
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74HC4024D652
Manufacturer:
NXP Semiconductors
Quantity:
1 927
1. General description
2. Features
3. Applications
The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024
of the 4000B series. The 74HC4024 is specified in compliance with JEDEC
standard no. 7A.
The 74HC4024 is a 7-stage binary ripple counter with a clock input (CP), an overriding
asynchronous master reset input (MR) and seven fully buffered parallel outputs (Q0 to
Q6).
The counter advances on the HIGH-to-LOW transition of CP.
A HIGH on MR clears all counter stages and forces all outputs LOW, independent of the
state of CP.
Each counter stage is a static toggle flip-flop.
Schmitt-trigger action in the clock input makes the circuit highly tolerant to slower clock
rise and fall times.
74HC4024
7-stage binary ripple counter
Low-power dissipation
Complies with JEDEC standard no. 7A
ESD protection:
Multiple package options
Specified from 40 C to +80 C and from 40 C to +125 C.
Frequency dividing circuits
Time delay circuits.
HBM EIA/JESD22-A114-B exceeds 2000 V
MM EIA/JESD22-A115-A exceeds 200 V.
Product data sheet

Related parts for 74HC4024D

74HC4024D Summary of contents

Page 1

General description The 74HC4024 is a high-speed Si-gate CMOS device and is pin compatible with the 4024 of the 4000B series. The 74HC4024 is specified in compliance with JEDEC standard no. 7A. The 74HC4024 ...

Page 2

... number of inputs switching Ordering information Table 2: Ordering information Type number Package Temperature range 74HC4024N +125 C 74HC4024D +125 C 74HC4024DB +125 C 74HC4024PW +125 C 9397 750 13813 Product data sheet Quick reference data = ns. amb r f Parameter propagation delay maximum clock frequency C ...

Page 3

... Philips Semiconductors 8. Functional description 8.1 Function table Table 4: Input [ HIGH voltage level LOW voltage level don’t care; = LOW-to-HIGH clock transition; HIGH-to-LOW clock transition. 9. Limiting values Table 5: In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). ...

Page 4

... Philips Semiconductors 10. Recommended operating conditions Table 6: Symbol amb 11. Static characteristics Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter amb V HIGH-level input voltage IH V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current ...

Page 5

... Philips Semiconductors Table 7: Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter V LOW-level input voltage IL V HIGH-level output voltage OH V LOW-level output voltage OL I input leakage current LI I quiescent supply current +125 C amb V HIGH-level input voltage IH V LOW-level input voltage ...

Page 6

... Philips Semiconductors 12. Dynamic characteristics Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter amb propagation delay PHL PLH propagation delay Qn to Qn+1 t propagation delay PHL output transition time THL TLH t CP clock pulse width HIGH or W LOW MR master reset pulse width HIGH ...

Page 7

... Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +85 C amb propagation delay PHL PLH propagation delay Qn to Qn+1 t propagation delay PHL output transition time THL TLH t CP clock pulse width HIGH or W LOW MR master reset pulse width HIGH t removal time ...

Page 8

... Philips Semiconductors Table 8: Dynamic characteristics GND = ns pF; see Symbol Parameter +125 C amb propagation delay PHL PLH propagation delay Qn to Qn+1 t propagation delay PHL output transition time THL TLH t CP clock pulse width HIGH or W LOW MR master reset pulse width HIGH t removal time ...

Page 9

... Philips Semiconductors 14. Package outline DIP14: plastic dual in-line package; 14 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 10

... Philips Semiconductors SO14: plastic small outline package; 14 leads; body width 3 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.01 0.069 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Related keywords