PIC12CE519-04I/SM Microchip Technology Inc., PIC12CE519-04I/SM Datasheet - Page 32

• Manufacturer Part Number: PIC12CE519-04I/SM
• Description: 8 PIN, 1.5 KB OTP, 41 RAM, 6 I/O, SOIC
• Manufacturer: Microchip Technology Inc.

Specifications of PIC12CE519-04I/SM

• Cpu Speed: 1 MIPS
• Eeprom Memory: 16 Bytes
• Input Output: 5
• Memory Type: OTP
• Number Of Bits: 8
• Package Type: 8-pin SOIC
• Programmable Memory: 1.5K Bytes
• Ram Size: 41 Bytes
• Speed: 4 MHz
• Timers: 1-8-bit
• Voltage, Range: 3-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC12C5XX
FIGURE 7-3:
FIGURE 7-4:
7.2
After generating a START condition, the bus master
transmits a control byte consisting of a slave address
and a Read/Write bit that indicates what type of opera-
tion is to be performed. The slave address consists of
a 4-bit device code (1010) followed by three don’t care
bits.
The last bit of the control byte determines the operation
to be performed. When set to a one a read operation is
selected, and when set to a zero a write operation is
selected. (Figure 7-5). The bus is monitored for its cor-
responding slave address all the time. It generates an
acknowledge bit if the slave address was true and it is
not in a programming mode.
DS40139E-page 32
SCL
SDA
SCL
SDA
(A)
Device Addressing
CONDITION
START
(B)
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
ACKNOWLEDGE TIMING
1
Transmitter must release the SDA line at this point
allowing the Receiver to pull the SDA line low to
acknowledge the previous eight bits of data.
2
3
Data from transmitter
4
ACKNOWLEDGE
ADDRESS OR
VALID
5
(C)
6
TO CHANGE
ALLOWED
7
DATA
Acknowledge
FIGURE 7-5:
8
Start Bit
Bit
S
9
1
Device Select
(D)
1
Receiver must release the SDA line at this point
so the Transmitter can continue sending data.
0
Bits
Data from transmitter
CONTROL BYTE FORMAT
Slave Address
1
2
0
1999 Microchip Technology Inc.
3
Read/Write Bit
Don’t Care
X
Acknowledge Bit
Bits
X
X
CONDITION
R/W
STOP
(C)
ACK
(A)