SI9978DW Vishay, SI9978DW Datasheet - Page 4

• Manufacturer Part Number: SI9978DW
• Description: Motor / Motion / Ignition Controllers & Drivers Half Bridge Driver
• Manufacturer: Vishay
• Type: Configurable H-Bridge Driverr

Specifications of SI9978DW

• Operating Supply Voltage: - 0.3 V to + 50 V
• Supply Current: 5 mA
• Mounting Style: SMD/SMT
• Package / Case: SO-24
• Operating Temperature: 85 C
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Si9978
Vishay Siliconix
PIN DESCRIPTION
Pin 1: V
V
pin to allow connection of a decoupling capacitor. A minimum
of 1 mF is recommended.
Pin 2: EN/EN
The EN input allows normal operation when at logic “1”, and
turns all gate drive outputs off when at logic “0”. When the
mode pin is at logic “1”, EN controls the entire H-bridge. When
the mode pin is at logic “0”, this pin becomes the ENABLE pin
for half-bridge A.
Pin 3: DIR/IN
The function of this pin is determined by the MODE pin. When
the MODE pin is at logic “1”, it is the DIR pin, and when MODE
is at logic “0”, it is the IN
As the DIR input, it is the direction control for the H-bridge, and
determines which diagonal pair of power MOSFETs is active.
A logic “1” turns on GT
turns on GT
anti-phase PWM control, the DIR input serves as the PWM
input.
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4
FAULT/FAULT
PIN CONFIGURATION AND ORDERING INFORMATION
DD
CL/FAULT
PWM/EN
is an internally generated voltage. It is connected to this
EN/EN
DIR/IN
QS/IN
MODE
R
R
DD
A
B
BRK
V
/C
/C
NC
DD
A
A
B
B
B
A
A
B
B
A
A
and enables GB
10
11
12
1
2
3
4
5
6
7
8
9
A
A
(Wide Body)
and enables GB
pin.
Top View
SO-24
A
. When implementing an
B
, while a logic “0”
24
23
22
21
20
19
18
17
16
15
14
13
V+
CAP
S
GT
GB
CAP
S
GT
GB
GND
IL
IL
A
B
B
A
A
+
+
A
B
B
A
B
As the IN
When at logic “1”, the high-side MOSFET is turned on, and
when at logic “0”, the low-side MOSFET is turned on.
Pin 4: PWM/EN
With the mode pin at logic “1”, this pin is the PWM input. It
controls the switching of the active diagonal pair. A logic “1”
turns the active MOSFETs on, while a logic “0” turns it off. The
QS input determines whether the bottom or both bottom and
top MOSFETs are switched. When implementing an
anti-phase PWM control, the PWM input is connected to a logic
“1”. When the mode pin is at logic “0”, this pin becomes the
ENABLE pin for half-bridge B.
Pin 5: QS/IN
With the mode pin at logic “1”, this input determines whether
the bottom MOSFETs of the H-bridge or both bottom and top
MOSFETs switch in response to the PWM signal. A logic “1” on
this input enables only the bottom MOSFETs. This is the
default condition as this pin is pulled up internally. When this
pin is pulled to ground, both the bottom and top MOSFETs are
enabled.
This input controls the B half-bridge when the MODE pin is at
logic “0”. When at logic “1”, the high-side MOSFET is turned on,
and when at logic “0”, the low-side MOSFET is turned on.
Part Number
Si9978DW
Si9978DW-T1
A
pin, it is the input that controls the “A” half-bridge.
ORDERING INFORMATION
B
Si9978DW-T1—E3
Lead (Pb)-Free
B
Part Number
Temperature
−40 to 85_C
40 to 85_C
Range
S-40804—Rev. E, 26-Apr-04
Document Number: 70011
(Wide Body)
Package
SOIC-24
SOIC-24