DS1708ESA/T&R+C03 Maxim Integrated Products, DS1708ESA/T&R+C03 Datasheet - Page 2
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DS1708ESA/T&R+C03
Manufacturer Part Number
DS1708ESA/T&R+C03
Description
Supervisory Circuits 3.3/5V MicroMonitor
Manufacturer
Maxim Integrated Products
Datasheet
1.DS1707ESA.pdf
(10 pages)
Specifications of DS1708ESA/T&R+C03
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
The third function the DS1707/DS1708 performs is pushbutton reset control. The DS1707/DS1708
debounces the pushbutton input and guarantees an active reset pulse width of 130 ms minimum.
OPERATION
Power Monitor
The DS1707/DS1708 detects out-of-tolerance power supply conditions and warns a processor-based
system of impending power failure. When V
outputs the RST and
processing is stopped at the last possible moment of valid V
active for a minimum of 130 ms to allow the power supply and processor to stabilize.
Pushbutton Reset
The DS1707/DS1708 provides an input pin for direct connection to a pushbutton reset (see Figure 2). The
pushbutton reset input requires an active low signal. Internally, this input is debounced and timed such
that RST and
as the pushbutton reset input is released from the low level. The pushbutton can be initiated by connecting
the
Non-Maskable Interrupt
The DS1707/DS1708 generates a non-maskable interrupt (
precision comparator monitors the voltage level at the IN pin relative to an on-chip reference generated
by an internal band gap. The IN pin is a high impedance input allowing for a user-defined sense point. An
external resistor voltage divider network (Figure 5) is used to interface with high voltage signals. This
sense point may be derived from a regulated supply or from a higher DC voltage level closer to the main
system power input. Since the IN trip point V
determined by the equation as shown in Figure 5. Proper operation of the DS1707/DS1708 requires that
the voltage at the IN pin be limited to V
monitored (V
to select a value for R2 high enough to keep power consumption low, and solve for R1. The flexibility of
the IN input pin allows for detection of power loss at the earliest point in a power supply system,
maximizing the amount of time for system shut-down between
When the supply being monitored decays to the voltage sense point, the DS1707/DS1708 pulses the
output to the active state for a minimum 200 ms. The
hysteresis of 100 mV. The supply must be below the voltage sense point for approximately 5 ms before a
low
preventing false interrupts. During a power-up, any detected IN pin levels below V
are disabled from generating an interrupt until V
will not be initiated until V
Connecting
an out-of-tolerance condition occurred in a monitored supply. An example is shown in Figure 3.
NMI
NMI
output to the
will be generated. In this way, power supply noise is removed from the monitoring function,
NMI
MAX
RST
) can also be derived as shown in Figure 5. A simple approach to solving the equation is
to
signals of at least 130 ms minimum will be generated. The 130 ms delay commences
PBRST
RST
PBRST
CC
signals. RST and
would allow the non-maskable interrupt to generate an automatic reset when
reaches V
input as shown in Figure 3.
CCTP
CC
. Therefore, the maximum allowable voltage at the supply being
.
RST
CC
TP
falls below the minimum V
CC
is 1.25 volts, the proper values for R1 and R2 can be
are excellent control signals for a microprocessor, as
rises to V
2 of 10
NMI
power-fail detection circuitry also has built-in
NMI
CCTP
CC
NMI
) for early warning of a power failure. A
. On power-up, RST and
. As a result, any potential
and RST/
CC
RST
tolerance, a comparator
.
TP
by the comparator
RST
NMI
are kept
pulse
NMI