MAX696MJE/883B Maxim Integrated Products, MAX696MJE/883B Datasheet - Page 5

• Manufacturer Part Number: MAX696MJE/883B
• Description: Supervisory Circuits MPU Supervisor
• Manufacturer: Maxim Integrated Products

Specifications of MAX696MJE/883B

• Monitored Voltage: 3 V to 5.5 V
• Output Type: Active High, Active Low, Push-Pull
• Manual Reset: Not Resettable
• Watchdog: Watchdog
• Battery Backup Switching: Backup
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 3 V
• Supply Current (typ): 300 uA
• Maximum Power Dissipation: 600 mW
• Maximum Operating Temperature: + 125 C
• Mounting Style: Through Hole
• Package / Case: CDIP-16
• Minimum Operating Temperature: - 55 C
• Power Fail Detection: Yes
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

MAX696
10
11
12
13
14
15
16
1
2
3
4
5
6
7
8
9
PIN
MAX697
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10
11
14
15
16
—
—
—
3
5
6
7
8
9
2
4
Microprocessor Supervisory Circuits
LOW LINE
BATT ON
OSC SEL
OSC IN
RESET
NAME
RESET
V
V
WDO
GND
PFO
N.C.
LL
V
WDI
BATT
PFI
OUT
CC
IN
Backup-Battery Input. Connect to ground if a backup battery is not used.
The higher of V
V
+5V Input
0V Ground Reference for All Signals
BATT ON goes High when V
when V
directly drive the base of an external pnp transistor to increase the output current
above the 50mA rating of V
LOW LINE goes Low when LL
rises above 1.3V. See Figure 5.
OSC IN Sets the Reset Delay Timing and Watchdog Timeout Period when OSC SEL
Floats or is Driven Low. The timing can also be adjusted by connecting an external
capacitor to this pin. See Figure 7. When OSC SEL is high, OSC IN selects between
fast and slow watchdog timeout periods
When OSC SEL is Unconnected or Driven High, the Internal Oscillator Sets the Reset
Time Delay and Watchdog Timeout Period. When OSC SEL is low, the external
oscillator input, OSC IN, is enabled. OSC SEL has a 3µA internal pullup. See Table 1.
PFI is the Noninverting Input to the Power-Fail Comparator. When PFI is less than
1.3V, PFO goes low. Connect PFI to GND or V
PFO is the Output of the Power-Fail Comparator. It goes low when PFI is less than
1.3V. The comparator is turned off and PFO goes low when V
The Watchdog Input, WDI, is a Three-Level Input. If WDI remains either high or low
for longer than the watchdog timeout period, RESET pulses low and WDO goes low.
The watchdog timer is disabled when WDI is left floating or is driven to mid-supply.
The timer resets with each transition at the watchdog timer input.
No Connection. Leave this pin open.
Low-Line Input. LL
precision 1.3V reference. The output is LOW LINE and is also connected to the reset
pulse generator. See Figure 2.
The Watchdog Output, WDO, goes Low if WDI Remains either High or Low for
Longer than the Watchdog Timeout Period. WDO is set high by the next transition at
WDI. If WDI is unconnected or at mid-supply, WDO remains high. WDO also goes
high when LOW LINE goes low.
RESET goes Low whenever LL
Input Voltage. RESET remains low for 50ms after LL
goes low for 50ms if the watchdog timer is enabled but not serviced within its
timeout period. The RESET pulse width can be adjusted as shown in Table 1.
RESET is an Active-High Output. It is the inverse of RESET.
OUT
and V
OUT
BATT
is internally switched to V
CC
are not used.
or V
IN
is the CMOS input to a comparator whose other input is a
BATT
OUT
is internally switched to V
OUT
IN
IN
.
Falls Below 1.3V. It returns high as soon as LL
is Internally Switched to the V
Falls Below 1.3V or V
FUNCTION
CC
. The output typically sinks 7mA and can
OUT
when not used. See Figure 1.
IN
OUT
goes above 1.3V. RESET also
CC
. Connect V
Falls Below the V
Pin Description
CC
BATT
is below V
Input. It goes low
OUT
to V
BATT
BATT
CC
IN
.
if
5