PEF24902HV21ZT Lantiq, PEF24902HV21ZT Datasheet - Page 33

• Manufacturer Part Number: PEF24902HV21ZT
• Manufacturer: Lantiq

Specifications of PEF24902HV21ZT

• Lead Free Status / Rohs Status: Supplier Unconfirmed

Figure 9
The 4B3T data is coded with the bits TD1, TD0:
Table 12
4B3T Data Pulse
0
+ 1
– 1
3.4.3
The delay in transmit direction depends on the slot x on SDX. The pulses on the four
lines are equally spaced in time while the transmit bits on SDX are not. The delay is
defined as the time from the end of last bit of the slot x on SDX until the start of the pulse
at AOUTx/BOUTx. The delay of IEC-4-AFE-X Version 3.2 is slightly larger as compared
to AFE-V2.1 ((3x + 27)
3.5
3.5.1
SCI is an interchip communication channel, which allows flexible exchange of
information between chips of Infineon´s chip family for linecard solutions.
It is mandatory to connect IEC-4-AFE-X Version 3.2 to the SCI bus.
3.5.2
Figure 10
Data Sheet
shows the typical SCI system configuration.
Propagation Delay in Transmit Direction
Serial Control Interface (SCI)
General
SCI System Configuration
Frame Structure on SDX and SDR in 4B3T Mode
Coding of the 4B3T Data Pulse (AOUTx/BOUTx)
*
65 ns + approximately 4 µs).
TD1
0
1
1
33
TD0
0
0
1
Functional Description
Rev. 1, 2004-05-28
PEB 24902
PEF 24902