MAX97236EVKIT+ Maxim Integrated Products, MAX97236EVKIT+ Datasheet - Page 28

• Manufacturer Part Number: MAX97236EVKIT+
• Description: Audio Modules & Development Tools MAX97236 Eval Kit
• Manufacturer: Maxim Integrated Products

Specifications of MAX97236EVKIT+

• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Table 16. Jack Detect Test Hardware Settings
The Enable_ registers contain all of the bits that control the separate functional blocks for the IC. The system can either
directly control these bits, or it can allow the IC to automatically configure itself and report in the Enable_ register which
blocks are enabled. When the AUTO bits (B1, B0) are set to 01 or 10, the Enable_ registers are read-only (except the
SHDN and SLEEP bits). The block enable bits need to be set to sense a jack removal. The jack removal circuitry is
active after the jack configurations detect algorithm has completed.
Table 17. Enable Registers
Audio Amplifier with Jack Detection
The Jack Detect Test Hardware Settings register programs the amplitude and width of the pulse used in the jack detec-
tion tests and jack insertion algorithm.
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REGISTER
REGISTER
AC Test
Enable1
Control
0x1A
0x1D
BIT
BIT
7
6
5
4
3
2
1
0
7
6
PULSE_WIDTH1
PULSE_WIDTH0
PULSE_AMP1
PULSE_AMP0
AC_REPEAT1
AC_REPEAT0
RESET
NAME
SHDN
NAME
—
—
Full Device Shutdown Control
SHDN turns the IC on and off. When SHDN is low, the device is in shutdown
mode and the jack insertion detect circuitry is active. Pull SHDN high to turn
on the device and run the jack configuration detect algorithm. Typically, SHDN
is held low until the system gets an interrupt from the IC, indicating that a jack
has been inserted. The system then pulls SHDN high.
0 = The IC is in shutdown mode with jack detection circuitry active.
1 = The IC is active. The jack configuration algorithm runs immediately after a
load has been detected.
RESET Jack Detection
Cycle RESET (low g high g low) to repeat the jack detection and configuration
algorithm.
—
—
AC_Repeat
00 = 1, 01 = 3, 10 = 5, 11 = 7.
Programs number of pulses sent for each jack detection test.
Pulse Width
00 = 50Fs, 01 = 100Fs, 10 = 150Fs, 11 = 300Fs. Test 1 and 4 pulse width
is fixed at 10Fs.
Pulse Amplitude
For tests 1 and 4, pulse amplitude is 00 = 25mV, 01 = 50mV, 10 = 100mV,
11 = 200mV. Tests 6, 7, and 8 pulse amplitude is 00 = 37mV, 01 = 75mV,
10 = 150mV, 11 = 220mV.
DESCRIPTION
DESCRIPTION
Pulse Test Hardware Settings
Enable Registers