80-000348 Critical Link LLC, 80-000348 Datasheet - Page 14

• Manufacturer Part Number: 80-000348
• Description: MCU, MPU & DSP Development Tools DEV KIT MITYDSP 1810/AM1810 PROFIBUS
• Manufacturer: Critical Link LLC
• Series: -r

Specifications of 80-000348

• Processor To Be Evaluated: AM1810
• Maximum Operating Temperature: + 85 C
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Critical Link, LLC
www.criticallink.com
www.mitydsp.com
Notes:
1
<signal_name>_N/_P can be configured as a differential pair or single-ended FPGA IO.
Pin
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1
2
3
4
5
6
7
8
9
Table 8: J702 Connector Pin Assignments - MityARM-1810F (with FPGA) Installed
FPGA_IO_36_N
FPGA_IO_36_P
FPGA_IO_34_N
FPGA_IO_34_P
FPGA_IO_32_N
FPGA_IO_32_P
FPGA_IO_30_N
FPGA_IO_30_P
FPGA_IO_28_N
FPGA_IO_28_P
FPGA_IO_26_N
FPGA_IO_26_P
FPGA_IO_24_N
FPGA_IO_24_P
FPGA_IO_2_N
FPGA_IO_2_P
FPGA_IO_4_N
FPGA_IO_4_P
FPGA_IO_6_N
FPGA_IO_6_P
FPGA_IO_8_N
FPGA_IO_8_P
FPGA_IO_10_N
FPGA_IO_10_P
FPGA_IO_12_N
FPGA_IO_12_P
FPGA_IO_14_N
FPGA_IO_14_P
FPGA_IO_16_N
FPGA_IO_16_P
FPGA_IO_18_N
FPGA_IO_18_P
FPGA_IO_20_N
FPGA_IO_20_P
FPGA_IO_22_N
FPGA_IO_22_P
FPGA_IO_1_N
FPGA_IO_1_P
FPGA_IO_3_N
FPGA_IO_3_P
FPGA_IO_5_N
FPGA_IO_5_P
FPGA_IO_7_N
FPGA_IO_7_P
FPGA_IO_9_N
FPGA_IO_9_P
Signal
GND
GND
GND
GND
1
1
Power
Power
Power
Power
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
LVDS, 3.3V LVCMOS/LVTTL
14
Standard
MityARM-1810 PROFIBUS Dev Kit
Copyright © 2007-2009, Critical Link LLC
22 November 2010
Notes